SFFS886 September 2024 TPS1214-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a Failure Mode Analysis (FMA) for the pins of the TPS1214-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to Ground (see Table 4-2)
- Pin open-circuited (see Table 4-2)
- Pin short-circuited to an adjacent pin (see Table 4-2)
- Pin short-circuited to supply (see Table 4-2)
Table 4-2 through Table 4-2 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the TPS1214-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS1214-Q1 data sheet.
Figure 4-1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- Follow data sheet recommendation for operating conditions, external component selection and PCB layout
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
EN/UVLO | 1 | Normal operation. The device is disabled. | B |
LPM | 2 | Device remains in low power mode (LPM) and bypass path (G) overcurrent protection is active. | B |
INP | 3 | If LPM = High then, Main path (GATE) does not turn ON. LPM = Low: No concern. | B |
SCP_TEST | 4 | Normal operation. SCP_TEST Diagnosis is not available. | B |
WAKE | 5 | Pin is pulled to GND through internal pull down. No concerns. In LPM, current is limited by external pull-up resistor on WAKE pin. WAKE functionality is not be available. | B |
FLT | 6 | I2t based Overcurrent, short-circuit, Charge pump UVLO fault diagnostic can not be reported. | B |
TMR | 7 | Device is in Latch off mode. | B |
GND | 8 | Normal operation. | D |
IMON | 9 | IMON information is not available. | B |
ITMPO | 10 | ITMPO information is not available. | B |
IOC | 11 | I2t based overcurrent protection is not be available. | B |
I2t | 12 | I2t based overcurrent protection is disabled. | B |
G | 13 | With G grounded, if the pin voltage between SRC and G exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
BST | 14 | Gate driver supply does not come up. Gate drives (GATE and G) remain OFF. | B |
| SRC | 15 | Output short to GND protection kicks in. | B |
GATE | 16 | With GATE grounded, if the pin voltage between SRC and GATE exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
TMP | 18 | With TMP grounded, if the pin voltage between TMP and SRC exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
CS1- | 19 | With CS1- grounded, if the pin voltage between CS1+ and CS1– exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
CS1+ | 20 | With CS1+ grounded, if the pin voltage between CS1+ and CS1– exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
ISCP | 21 | With ISCP grounded, if the pin voltage between ISCP and CS1– exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
VS | 22 | With VS grounded, if the pin voltage between VS and SRC exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
CS2- | 23 | False loadwakeup triggers. | B |
CS2+ | 24 | With CS2+ grounded, if the pin voltage between CS2+ and SRC exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. | A |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
|
EN/UVLO |
1 |
Internal pulldown brings EN/UVLO to low disabling the device. |
B |
|
LPM |
2 | Internal
pulldown brings LPM to low, pulling G output
high. Device can not transition to Active mode. |
B |
|
INP |
3 |
Internal pulldown brings INP to low, pulling GATE output low. |
B |
|
SCP_TEST |
4 |
Internal
pulldown brings SCP_TEST to low. Normal operation. SCP_TEST Diagnosis is not available. |
B |
|
WAKE |
5 |
WAKE is pulled to GND in active mode through internal switch. WAKE indication is not available. |
B |
|
FLT |
6 |
I2t based Overcurrent, short-circuit, Charge pump UVLO fault diagnostic can not be reported. |
B |
|
TMR |
7 |
Device goes to auto-retry mode after overcurrent fault with minimum auto-retry time based on parasitic capacitor on TMR pin. |
B |
|
GND |
8 |
Device does not power up and is disabled. |
B |
|
IMON |
9 |
I2t based overcurrent protection is disabled. |
B |
|
ITMPO |
10 |
Normal operation. |
D |
|
IOC |
11 |
Minimum I2t start threshold OCP threshold is set. I2t based overcurrent protection is incorrect. Device powers up but main path (GATE) turns OFF based on CI2t. | B |
|
I2t |
12 |
I2t based overcurrent protection is incorrect. |
B |
|
G |
13 |
G output is not controlled. Bypass path remains OFF. |
B |
|
BST |
14 |
External FET is turned ON and OFF repetitively due to no capacitor connection at BST pin. |
B |
| SRC |
15 |
The external FET does not turn OFF as the FET source got disconnected from the internal pulldown driver. | B |
|
GATE |
16 |
The external FET does not turn OFF as the FET GATE disconnects from the internal pulldown driver. | B |
|
TMP |
18 |
ITMPO is unavailable. |
B |
|
CS1- |
19 |
CS1– is internally clamped to CS1+ minus 2 diode drops. Device detects false short-circuit fault. IMON and I2t protection are unavailable. |
B |
|
CS1+ |
20 |
Device detects false short-circuit fault. IMON and I2t protection are unavailable. |
B |
|
ISCP |
21 |
Short-circuit protection feature is disabled. |
B |
|
VS |
22 |
Device is not powered up and is disabled. |
B |
| CS2- |
23 |
Device detects false loadwakeup event. |
B |
| CS2+ |
24 |
Device is damaged. |
A |
| Pin Name | Pin No. |
Shorted to |
Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
|
EN/UVLO |
1 |
2 (LPM) |
When EN/UVLO is driven high then device turns ON in Active mode | B |
| LPM |
2 |
3 (INP) |
When INP is Low: Device remains in LPM. High current protection in Bypass path (G) active. When INP is High: Device powers up in active mode. |
B |
|
INP |
3 |
4 (SCP_TEST) |
If SCP_TEST = Low and LPM = High then, Main path (GATE) is not turn ON. INP voltage goes to 0V. LPM = Low: No concern. If SCP_TEST = High and LPM = High: Main path (GATE) is always be OFF and FLT asserts low. LPM Low: No concern. |
B |
|
SCP_TEST |
4 |
5 (WAKE) |
Device can damage if SCP_TEST is connected to a strong supply with current higher than 5mA and WAKE goes low during active mode. Preventive action is to connect diode and at least 1kΩ resistor in series with SCP_TEST |
B |
|
WAKE |
5 |
6 (FLT) |
WAKE and FLT indication not available. |
B |
|
TMR |
7 |
8 (GND) |
Device is set to latch-off mode if overcurrent fault is detected. |
B |
|
GND |
8 |
9 (IMON) |
IMON output is not reported. | B |
|
IMON |
9 |
10 (ITMPO) |
IMON and ITMPO output is not reported. |
B |
|
ITMPO |
10 |
11 (IOC) |
Device can detect false I2t based overcurrent and ITMPO output is not reported. |
B |
|
IOC |
11 |
12 (I2t) |
Device can detect false I2t based overcurrent. |
B |
|
G |
13 |
14 (BST) |
BST cap can discharge through the pull down on G pin. Bypass path (G) is not be able to turn ON if VGS(th) of bypass FET is > 2V. |
B |
|
BST |
14 |
15 (SRC) |
Gate drive supply is shorted and external FETs do not turn ON. | B |
| SRC |
15 |
16 (GATE) |
Shorting of the pulldown switch (between GATE and SRC) of the internal gate driver. External FET remains OFF. | B |
|
CS1- |
19 |
18 (CS1+) |
Bypasses the external current sense resistor. IMON, overcurrent and short-circuit protection features get disabled. |
B |
|
CS1+ |
20 |
19 (ISCP) |
IMON information is not available. False SCP can trigger. |
B |
|
ISCP |
21 |
20 (VS) |
Short-circuit protection is set to minimum setting (2mV). |
C |
|
VS |
22 |
23 (CS2-) |
Loadwakeup functionality is unavailable. |
B |
| CS2- |
23 |
24 (CS2+) |
Loadwakeup functionality is unavailable. |
B |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
|
EN/UVLO |
1 | Device remains enabled. If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
LPM |
2 | Device turns ON in active mode. If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
INP |
3 |
Main path (GATE) remains ON in active mode. If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
SCP_TEST |
4 |
If LPM = High then, Main path (GATE) remains OFF in active mode. If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
WAKE |
5 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
FLT |
6 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
TMR |
7 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
GND |
8 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
IMON |
9 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
ITMPO |
10 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
IOC |
11 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
I2t |
12 | If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
G |
13 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
BST |
14 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
| SRC |
15 |
Output stuck on to supply |
B |
|
GATE |
16 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
TMP |
18 |
If pin voltage exceeds the pin data sheet range, the voltage can cause device damage due to voltage breakdown on ESD circuit. |
A |
|
CS1- |
19 |
In the application, the external sense resistor is bypassed and IMON, I2t based over current and short circuit protection is not work. |
B |
|
CS1+ |
20 |
IMON and I2t outputs are saturated. External FET (GATE) turns OFF due to false overcurrent event. |
B |
|
ISCP |
21 |
Short-circuit protection is set to minimum setting of 2mV. |
C |
|
VS |
22 |
Normal operation. |
D |
| CS2- |
23 |
Loadwakeup functionality is disabled. |
B |
| CS2+ |
24 |
Normal operation. |
D |