SFFS926 June   2024 PGA308

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 VSSOP (DGS) Package
    2. 2.2 VSON (DRK) Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 VSSOP (DGS) Package
    2. 4.2 VSON (DRK) Package

1 Overview

This document contains information for the PGA308 (VSSOP (DGS) and VSON (DRK) packages) to aid in a functional safety system design. Information provided are:

  • Functional safety failure in time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (pin FMA)

Figure 1-1 shows the device functional block diagram for reference.

PGA308 Functional Block DiagramFigure 1-1 Functional Block Diagram

The PGA308 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.