SFFS926 June   2024 PGA308

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 VSSOP (DGS) Package
    2. 2.2 VSON (DRK) Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 VSSOP (DGS) Package
    2. 4.2 VSON (DRK) Package

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the PGA308 (VSSOP (DGS) and VSON (DRK) packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-6 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Short circuit to power means short to V+
  • Short circuit to GND or ground means short to V–
  • V+ is equivalent to VCC and V‒ equivalent to VEE