This section provides a failure mode analysis
(FMA) for the pins of the ISO7741Tx-Q1 (16-DW SOIC). The failure modes covered in this
document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure
effects classification in Table 4-1.
Table 4-1 TI Classification of Failure EffectsClass | Failure
Effects |
---|
A | Potential device
damage that affects functionality |
B | No device damage, but loss of
functionality |
C | No device damage, but performance
degradation |
D | No device damage, no impact to
functionality or performance |
Following are the assumptions of use and the
device configuration assumed for the pin FMA in this section:
- The external transformer for the push-pull driver
is connected with a winding between D1 and VCC1 and the second
winding is connected between D2 and VCC1.
- For short-to-ground analysis, the
ground referenced for the short is the ground on that side of the isolation
barrier.
- For short-to-supply analysis, the
supply referenced for the short is the supply on that side of the isolation
barrier.
- The default output state for OUTx
outputs are high for ISO7741TADWRQ1
and ISO7741TBDWRQ1 and low for
ISO7741FTADWRQ1
and ISO7741FTBDWRQ1.
- The switching frequency for the A, 160kHz, or B, 420kHz, versions of the ISO7741Tx-Q1 device does not impact the pinFMA.
- The signal drivers to any or all
input channels, INx, do not have enough current sourcing capability to provide
regular operating current of the device if the input signal current is conducted
into the VCCx supply of the device through an ESD diode on the INx
pin if the VCCx pin on the input pin side of the device is floating.