SFFS929 July 2024 TPS551892-Q1
The failure mode distribution estimation for the TPS551892-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or overstress.
Die Failure Modes | Failure Mode Distribution (%) |
---|---|
VO not in specification voltage or timing | 50 |
VO no output GND or HIZ | 12.5 |
Software FETs stuck on | 30 |
EN enable fails or false enable | 2.5 |
Short circuit on any two pins | 5 |