SFFSA11 October 2024 SN74LVC1G66-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the SN74LVC1G66-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to VCC (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure
Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the pin diagram. For a detailed description of the device pins, please refer to the Pin Configuration and Functions section in the SN74LVC1G66-Q1 data sheet.
Figure 4-1 Pin Diagram (SOT-23 and SOT-SC70 Packages)Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| A | 1 | Corruption of analog signal on A. If there is no limiting resistor in the switch path, device damage is possible. | A |
| B | 2 | Corruption of analog signal on B. If there is no limiting resistor in the switch path, device damage is possible. | A |
| GND | 3 | No effect, normal operation. | D |
| C | 4 | C stuck low. Cannot control switch state. | B |
| VCC | 5 | Device is not powered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage is possible. | A |
Table 4-3 Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| A | 1 | Corruption of analog signal on A. | B |
| B | 2 | Corruption of analog signal on B. | B |
| GND | 3 | Device is not powered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage is possible. | A |
| C | 4 | Loss of control of IN pin. Switch in undefined state. | B |
| VCC | 5 | Device is not powered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage is possible. | A |
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted To | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| A | 1 | B | Corruption of analog signal on A. | B |
| B | 2 | GND | Corruption of analog signal on B. | B |
| GND | 3 | C | Not considered. This is a corner pin. | D |
| C | 4 | VCC | C stuck to VCC. Cannot control switch states | B |
| VCC | 5 | A | Not considered, Corner pin. | D |
Table 4-5 Pin FMA for Device Pins Short-Circuited to VCC
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| A | 1 | Corruption of analog signal on A. If there is no limiting resistor in the switch path, device damage is possible. | A |
| B | 2 | Corruption of analog signal on B. If there is no limiting resistor in the switch path, device damage is possible. | A |
| GND | 3 | Device is not powered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met. Otherwise, device damage is possible. | A |
| C | 4 | C stuck to VCC. Cannot control switch states. | B |
| VCC | 5 | No effect, normal operation. | D |