SLAA126B April 2001 – September 2018 MSP430F149 , MSP430F149 , TLC3544 , TLC3544 , TLC3548 , TLC3548
Table 2 shows the complete device pin assignments for both the TLC3544 and TLC3548 devices.
3544 | 3548 | Pin Name | Description |
---|---|---|---|
1 | 1 | SCLK | Serial input clock |
2 | 2 | FS | Frame sync: DSP frame synchronization input, tied to Vcc when not used |
3 | 3 | SDI | Serial data Input: the 4 most significant bits select test modes, mux channel, and conversion speed |
4 | 4 | EOC/INT | End of conversion/interrupt: used to indicate the converter is busy, or as an external interrupt source to the host processor |
5 | 5 | SDO | 3-State serial output of conversion result |
6 | 6 | DGND | Digital ground reference |
7 | 7 | DVDD | Digital supply voltage: 2.7 to 5.5 V dc |
8 | 8 | CS | Chip select: active low |
9-12 | A0 – A4 | Analog inputs of the TLC3544 | |
9-16 | A0 – A8 | Analog inputs of the TLC3548 | |
13 | 17 | AVDD | Analog supply voltage |
14 | 18 | AGND | Analog ground reference |
15 | 19 | REFP | Upper reference voltage: 5.0 V maximum |
16 | 20 | REFM | Lower reference voltage: nominally ground |
17 | 21 | BGAP | Internal band gap compensation: see data sheet for requirements |
18 | 22 | AGND | Analog ground reference |
19 | 23 | AVDD | Analog supply voltage |
20 | 24 | CSTART | External start of conversion trigger: used for extended sampling mode |