SLAA126B April 2001 – September 2018 MSP430F149 , MSP430F149 , TLC3544 , TLC3544 , TLC3548 , TLC3548
The data converter EVM used for this application report can have either the TLC3544 or the TLC3548 installed at location U9. These are 14-bit, 200-ksps serial analog-to-digital converters with four (TLC3544) or eight (TLC3548) analog input channels.
The TLC3544 and TLC3548 devices operate from a single 5-V analog supply and a 3.3-V or 5.0-V digital supply. The EVM contains regulators that provide all the necessary voltages from a standard 12-V laboratory power supply.
The EVM features a convenient onboard signal generator as well as all the necessary hardware to provide accurate reference voltages to the data converters. Connectors J12, J13, and J14 are
10-pin dual-row headers. These headers simplify interfacing a microcontroller-based system. The shorting bars can be removed from headers J13 and J14, allowing the user to define a custom signal-interface to the EVM.
System I/O voltages, as well as the voltage on the digital portion of the ADC, can be set to either 3.3 V or 5.0 V by changing the position of W17. When W17 is in position 2-3, the I/O voltage is set to 5.0 V. Position 1-2 on W17 lowers the I/O voltage to 3.3 V, which is necessary when running the low-power MSP430™ family of microcontrollers.
Although the onboard signal generator was used as the analog source in this application report, the TLC3544/48 EVM contains a variety of input and output connectors, signal conditioning circuits, and reference voltage options, so that users can define custom analog input conditions. It is even possible to tie the EVM directly into an existing control system – see the TLC3578 Family Evaluation Module User's Guide for complete details.
Pin No. | MSP430F149 Port | J12 Pin Name | Signal Description |
---|---|---|---|
1 | P3.5 - SS CS | HOST_CNTLa | Low = ADC CS; High = DAC CS |
3 | P3.3 - CLKS | HOST_CLKXa | Serial clock to EVM |
5 | Not used | HOST_CLKRa | Serial clock return to HOST |
7 | P3.1 - MOSI | HOST_DXa | Serial data to EVM |
9 | P3.2 - MISO | HOST_DRa | Serial data to host |
11 | P3.6 - GPIO | HOST_FSXa | Frame sync to EVM |
13 | Not used | HOST_FSRa | Frame sync return to host |
15 | P1.1 - EINT | HOST_INT* | ADC configured as INT |
ADC configured as EOC | |||
17 | Not used | HOST_CLKSa | Clock source for host – from EVM |
19 | P3.7 - GPIO | HOST_CNTLb | CSTART to ADC |
2 to 20 (even) | GND | DGND | Ground connections |