SLAA475A October   2010  – March 2019 MSP430L092

 

  1.   MSP430x09x Analog Pool: Feature Set and Advanced Use
    1.     Trademarks
    2. 1 MSP430x09x Overview
    3. 2 Analog Pool (A-Pool)
      1. 2.1  Input Dividers
      2. 2.2  Internal Reference
      3. 2.3  Starting and Stopping the A-Pool
      4. 2.4  Comparator Function
      5. 2.5  8-Bit DAC Function
      6. 2.6  8-Bit ADC Function
        1. 2.6.1 ADC Conversion Using Ramp
          1. 2.6.1.1 ADC Conversion Without Error Compensation
          2. 2.6.1.2 ADC Conversions With Overdrive Compensation
          3. 2.6.1.3 ADC Conversions With Offset Compensation
          4. 2.6.1.4 ADC Conversions With Overall Compensation
          5. 2.6.1.5 Windowed ADC Conversion
        2. 2.6.2 ADC Conversion Using SAR
        3. 2.6.3 Multiple ADC Conversions
        4. 2.6.4 Comparison Between Different Measurement Methods
        5. 2.6.5 Error Dependencies
      7. 2.7  SVM Function
      8. 2.8  Use of Multiple Features
      9. 2.9  Temperature Measurements With the A-Pool
      10. 2.10 Fractional and Integer Number Use
      11. 2.11 APINTB and APFRACTB Use With ATBU and EOCBU
      12. 2.12 A-Pool Trigger Sources
      13. 2.13 Filtering ADC Conversions With Digital Filters
    4. 3 Summary
    5. 4 References
  2.   Revision History

2.3 Starting and Stopping the A-Pool

The A-Pool is controlled by the user software. Depending on the analog function, the A-Pool can be started and stopped in several ways.

To start the A-Pool in a comparator mode the first time or after making any changes to the comparator settings, it is recommended to use the following code.

APCTL = APPSEL_x+APNSEL_x; // Make new settings for comparator input APCNF |= LCMP+CMPON; // Trigger filter again + // Start comparison

Depending on the filter settings, the comparison starts at one of these two lines. With a filter setting of 0 (DFSET = 0) the comparison starts immediately after the write of APCTL. In this case, the second line is not needed. With any other filter setting, the comparison starts with the execution of the second line, because the filter settings must be updated again. This can be done by a dummy write to the LCMP bit, which is bit 4 in the APCNF register.

The following code shows a comparator example with the internal DAC as the first input and an external voltage as the second input. The sample code also changes the inputs for the comparator to show the appropriate restart mechanism. A toggle on CxOUT output can be observed when a voltage higher than 0 is provided to the A1 input.

#include "msp430l092.h" void main( void ) { // Stop watchdog timer to prevent time out reset WDTCTL = WDTPW + WDTHOLD; P1DIR = BIT3; // Set CxOUT to port pin P1SEL0 = BIT3; P1SEL1 = BIT3; APINT = 0x00; // Set compare value to 0 APCNF = CMPON+APREFON+DBON+CONVON+DFSET_2; // Comparator on + // Reference on + // Buffer on + // Conversion on + // Filter on while(1) { APCTL = APNSEL0+APNSEL2+OSEL; // Set DAC as pos input + // Set A0 as neg input + // Switch DAC to multiplexer APCNF |= LCMP+CMPON; // Trigger filter again + // Start comparison APCTL = APPSEL0+APPSEL2+OSEL; // Set DAC as neg input + // Set A0 as pos input + // Switch DAC to multiplexer APCNF |= LCMP+CMPON; // Trigger filter again + // Start comparison } }

The DAC functionality is enabled by setting the CONVON bit to 1. Any change in the APINT or APFRACT register triggers an immediate change in the analog voltage that is either provided to the AOUT pin or used internally, depending on the A-Pool configuration.

The ADC functionality is enabled either by setting the RUNSTOP bit to 1 or by using external trigger sources for starting the ADC. The RUNSTOP bit can be used for a direct software start trigger and is located in the APCTL register. To avoid any unpredictable behavior, TI recommends always writing the APCTL register word-wise or with a bit set on the RUNSTOP register. Arithmetical or logical operations on the APCTL register, even with an unaffected RUNSTOP bit, can trigger unexpected behavior. The code snippets in this application report always use a word-wise write to the APCTL register.

For stopping an ADC conversion, any one of several methods can be used. A hard stop can be done either by setting the RUNSTOP bit to 0 or by using external triggers. In addition, the ADC stops at the measured value when the CBSTP bit is set to 1, or the ADC can be stopped at the highest or lowest value when SBSTP bit is set to 1, depending on the selected slope.