SLAA513B December   2011  – February 2022 MSP430G2112 , MSP430G2112 , MSP430G2152 , MSP430G2152 , MSP430G2212 , MSP430G2212 , MSP430G2252 , MSP430G2252 , MSP430G2312 , MSP430G2312 , MSP430G2352 , MSP430G2352 , MSP430G2412 , MSP430G2412 , MSP430G2452 , MSP430G2452

 

  1.   Trademarks
  2. 1Typical Single Time Base Method
  3. 2Multiple Time Base Method
  4. 3Implementing the Multiple Time Base Method in a Custom Application
    1. 3.1 Timer Clock Source Selection
    2. 3.2 Period and Frequency Calculation
    3. 3.3 Duty Cycle Calculation
  5. 4Example Code
    1. 4.1 Method
      1. 4.1.1 ISR for Multiple Frequencies
      2. 4.1.2 ISR for Multiple Frequencies and Duty Cycles (PWM)
    2. 4.2 Included Code Examples
  6. 5Limitations of the Multiple Time Base Method
    1. 5.1 ISR Overhead
    2. 5.2 Maximum Output Frequency vs Number of Signals
    3. 5.3 Power Consumption
  7. 6References
  8. 7Revision History

3.3 Duty Cycle Calculation

To generate a PWM on the timer module, a second count is used to set the duty cycle. The duty cycle generated is the ratio of the number of timer counts for the high time (nhigh) to the number of timer counts for one period (nperiod). For the multiple time base method, the timer counts for the low (nlow) and high (nhigh) time are the offsets that are added into the TxCCRx register in the ISR (see Equation 3).

Equation 3. GUID-8203BDD7-BE33-4329-8EAF-409FB3DCA246-low.gif

Figure 3-1 shows how the TxCCRx values and nhigh and nlow are used when implementing two independent PWM frequencies and duty cycles on a single MSP430 timer module. Compare this to Figure 2-1, where constant values were added to TxCCR0 and TxCCR1 to produce a 50% duty cycle.

GUID-9390F482-8783-4484-A829-2201B6B229E1-low.gifFigure 3-1 Continuous Mode PWM Generation