SLAA558A November   2012  – October 2018 MSP430F5212 , MSP430F5214 , MSP430F5217 , MSP430F5219 , MSP430F5222 , MSP430F5224 , MSP430F5229 , MSP430F5252 , MSP430F5253 , MSP430F5254 , MSP430F5255 , MSP430F5256 , MSP430F5257 , MSP430F5258 , MSP430F5259

 

  1.   Designing With MSP430F522x and MSP430F521x Devices
    1.     Trademarks
    2. 1 Split-Supply I/O Systems
    3. 2 DVIO Supplied I/Os
    4. 3 Secondary Digital Functions on DVIO Supplied I/Os
    5. 4 Split-Supply Power-Up or Power-Down Sequence
    6. 5 Reset and NMI Pin Functionality
    7. 6 XT1 and XT2 Oscillators in Bypass Mode
    8. 7 Bootloader (BSL)
      1. 7.1 BSL Entry Sequence for DVIO Supplied BSL Interface
      2. 7.2 BSL Exit Sequence for DVIO Supplied BSL Interface
    9. 8 Debugger Connections
      1. 8.1 JTAG Standard Interface
      2. 8.2 Spy-Bi-Wire Interface
      3. 8.3 Debugging Without DVIO
    10. 9 References
  2.   Revision History

6 XT1 and XT2 Oscillators in Bypass Mode

The F522x and F521x devices have two on-chip crystal oscillators:

  • XT1: low-frequency crystal oscillator
  • XT2: high-frequency crystal oscillator

Both XT1 and XT2 oscillators can be operated in crystal bypass mode, in which external clock signals are input to the XIN and XT2IN pins, respectively, and the oscillators associated with XT1 and XT2, respectively, are powered down. By default, the XIN and XT2IN pins reside on the DVCC supply domain and require the external clock signal to meet the data sheet specified input specifications for I/Os in DVCC domain.

Additionally, the F522x and F521x devices support XT1 and XT2 bypass operation with external clock inputs that reside on the DVIO supply domain. Setting the XT1BYPASSLV and XT2BYPASSLV bits in the UCSCTL9 register enables the XT1 and XT2 bypass operations, respectively, with external clock signals that swing from 0 V to DVIO.

In both the cases, the external clock input frequency must meet the data sheet parameters for the chosen mode.

On the F522x and F521x devices, the XIN and XOUT (XT1) and XT2IN and XT2OUT (XT2) pins are multiplexed with the general-purpose I/O pins that reside on the DVCC supply domain. When the XT1 and XT2 oscillators are configured in crystal bypass mode, the XIN and XT2IN pins, respectively, can accept external clock input signals, and the XOUT and XT2OUT pins, respectively, can be configured as general-purpose I/O pins that are supplied by DVCC.