2.5 DAC Mode

The SAC-L3 includes a 12-bit DAC. The DAC can be used as the reference voltage and also can work with the OA and PGA to drive the output pad directly. When using DAC to generate signal and drive other circuit, OA must be configured into buffer mode to improve the drive strength. The red highlighted part in Figure 8 shows the SAC DAC mode, in this mode, the 12-bit DAC and built-in OA must be enabled together, and PGA MSEL is set to floating status.

Example 5 shows one code sequence of configuring the SAC into DAC mode with driver library API functions. In this code, the internal shared reference is selected as the DAC reference and the DAC always loads data from DACDAT at the positive edge of timer output TB2.1. The DAC module can generate an interrupt when DACIE is set, a set DACIFG bit indicate that the DAC is ready for new data. There are two device-specific references selected by DACSREF bits. The MSP430FR2355 MCU supports an internal shared reference and V_CC as the DAC reference. The trigger signal for the DAC loading data is also device-specific, this code only shows one configuration and users change the configuration by changing API parameters. Example 5 shows only the configuration code for the SAC module. To make SAC work in DAC mode, users should also take care of other related things like internal shared reference setting, Timer_B2 setting, and interrupt service routine.