SLAAE59 may 2023 AFE539A4
//Stop the state machine.
WRITE STATE-MACHINE-CONFIG0(0x27), 0x00, 0x00
//Enable all AFE channels
WRITE COMMON-CONFIG(0x1F), 0x0F, 0xF9
//Select the desired voltage reference, output range, and comparator settings for each AFE. Channels 0, 2, and 3 are configured as comparators.
//set AFE 0...
WRITE DAC-0-VOUT-CMP-CONFIG(0x03), 0x14, 0x05
//set AFE 1...
WRITE DAC-1-VOUT-CMP-CONFIG(0x09), 0x80, 0x00
//set AFE 2...
WRITE DAC-2-VOUT-CMP-CONFIG(0x0F), 0x04, 0x03
//set AFE 3...
WRITE DAC-3-VOUT-CMP-CONFIG(0x15), 0x14, 0x05
//Calculate the voltage range for AFE1 using the equation in the data sheet, and configure the minimum and maximum output.
//Using a maximum of 1.6V
WRITE SRAM-DATA-32(0x20), 0xE1, 0xC0
//Using a minimum of 0.8V.
WRITE SRAM-DATA-33(0x21), 0x70, 0xC0//Set the configuration parameters LOOP-POLARITY, ADC0-MODE, CMP2-THRESHOLD, and SAFEOUTPUT as appropriate for the system
//Loop polarity, ADC0 mode, and Safe-output can be configured in SRAM-DATA-39
WRITE SRAM-DATA-34(0x22), 0x02, 0xDA
//CMP_2 Threshold is configured in SRAM_DATA_36
WRITE SRAM-DATA-36(0x23), 0x80, 0x00
//Program the initial values of KP and KI
//Note a higher KP is bad for systems with a fast response.
WRITE SRAM-DATA-35(0x24), 0x00, 0x01
//Note a higher KI can mean worse steady state response; KI can be disabled if set to 0
WRITE SRAM-DATA-38(0x25), 0x00, 0x00
//Calculate a desired common mode value using the
WRITE SRAM-DATA-37(0x26), 0x02, 0xFF
//Set the loop polarity, ADC impedance, and safe output value
WRITE SRAM-DATA-39(0x20), 0x00, 0x02
//Start the state machine
WRITE STATE-MACHINE-CONFIG0(0x27), 0x00, 0x03
//Tune the KI and KP values to achieve the best steady-state and transient response.
WRITE SRAM-DATA-35(0x24), 0x80, 0x00
WRITE SRAM-DATA-38(0x25), 0x00, 0x0F
//Store the register settings
WRITE COMMON-TRIGGER(0x20) 0x00, 0x02