SLAAEC6A October   2023  – January 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 System Overview
    2. 2.2 Hardware Overview
      1. 2.2.1 AC-MB Settings
        1. 2.2.1.1 Audio Serial Interface Settings
          1. 2.2.1.1.1 USB Mode
          2. 2.2.1.1.2 Optical or Auxiliary Analog Audio Input Mode
          3. 2.2.1.1.3 External Audio Interface Mode
        2. 2.2.1.2 AC-MB Power Supply
      2. 2.2.2 TAx5x1xQ1EVM-K Hardware Settings
        1. 2.2.2.1 TAx5x1x-Q1 EVM Input Hardware Settings
          1. 2.2.2.1.1 Line Inputs
          2. 2.2.2.1.2 On-Board Microphone Input
        2. 2.2.2.2 TAx5x1x-Q1 EVM Output Hardware Settings
          1. 2.2.2.2.1 TAx5x1x-Q1 Analog Audio Output
      3. 2.2.3 Diagnostics Hardware Setup
        1. 2.2.3.1 Short to MICBIAS Setup
        2. 2.2.3.2 Short to VBAT Setup
        3. 2.2.3.3 Shorted Input Pins Setup
        4. 2.2.3.4 Short to GND Setup
      4. 2.2.4 GPIO1 Hardware Configurations
      5. 2.2.5 GPO1A Hardware Configurations
      6. 2.2.6 GPI1A Hardware Configurations
      7. 2.2.7 GPI2A Hardware Configurations
      8. 2.2.8 I2C Address Hardware Configurations
      9. 2.2.9 Audio Serial Interface Hardware Configurations
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 PurePath Console 3 Installation
      1. 3.2.1 USB Audio Setup
    3. 3.3 TAx5x1x-Q1 EVM GUI
      1. 3.3.1 Software Overview
      2. 3.3.2 Configuration View
        1. 3.3.2.1 Device Config Tab
        2. 3.3.2.2 Record Config Tab
        3. 3.3.2.3 Playback Config Tab
        4. 3.3.2.4 Audio Serial Bus Tab
          1. 3.3.2.4.1 Configuring Primary Audio Serial Bus
          2. 3.3.2.4.2 Configuring Secondary Audio Serial Bus
          3. 3.3.2.4.3 Example Configuring I2S Interface
        5. 3.3.2.5 GPIO/Interrupts Tab
        6. 3.3.2.6 Advanced Tabs
          1. 3.3.2.6.1 Diagnostic Tab
          2. 3.3.2.6.2 Programmable Biquads Tab
          3. 3.3.2.6.3 Mixer Tab
          4. 3.3.2.6.4 Limiter Tab
      3. 3.3.3 End System Integration View
      4. 3.3.4 Register Map View
      5. 3.3.5 Preset Configuration
      6. 3.3.6 I2C Monitor View
    4. 3.4 Configuration Examples
  10. 4Hardware Design Files
    1. 4.1 TAC5412-Q1 EVM Schematic
    2. 4.2 TAC5411-Q1 EVM Schematic
    3. 4.3 TAC541x-Q1 EVM Board Layout
    4. 4.4 Bill of Materials (BOM)
      1. 4.4.1 TAC5412-Q1 EVM Bill of Materials
      2. 4.4.2 TAC5411-Q1 EVM Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
    2. 5.2 Cable References
  12. 6Revision History

3.4 Configuration Examples

The following are several examples of configuring the device into the respective paths. These device configurations can be used with external host or instrument like Audio Precision. For testing with the AC_MB host of the EVM, use the GUI Preset Configuration. This is because the AC_MB host is configured to support only TDM and the polarity is different from these devices.

Users can copy the settings below and paste them into the I2C Monitor window to configure the device when used with external host/instrument.

  • Target mode differential AC-couple recording with PASI

This configuration is for differential audio recording (ADC) with a 48 kHz sampling rate, TDM format, and 32-bit depth.

##### Record AC-Couple Differential IN1-IN2 path ######
# Target Mode, TDM, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 10 50    # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 30	# PASI TDM, 32-bit format
w a0 1e 20	# PASI Ch1 on slot 0
w a0 1f 21	# PASI Ch2 on slot 1
w a0 00 01	# Set page 1
w a0 73 D0	# auto device, set MICBIAS = 9V
w a0 00 00	# Set page 0
w a0 50 00	# Auto device ADC Ch1 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 55 00	# Auto device ADC Ch2 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 76 c0	# Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0	# Power up ADC and MICBIAS
  • Target mode single-ended AC-couple recording with PASI

This configuration is for single-ended audio recording (ADC) with a 48 kHz sampling rate, I2S format, and 32-bit depth.

##### Record AC-Couple Single-Ended IN1-IN2 path ######
# Target Mode, I2S, 32 bit
# Primary ASI only, multiple of 48KHz Sampling
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 10 50    # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 70	# PASI I2S, 32-bit format
w a0 1e 20	# PASI Ch1 on Left slot 0
w a0 1f 30	# PASI Ch2 on Right slot 0
w a0 00 01	# Set page 1
w a0 73 d0	# auto device, set MICBIAS = 9V
w a0 00 00	# Set page 0
w a0 50 40	# Auto device ADC Ch1 SE input, fixed 33.3KOhm, ac-coupled, audio band
w a0 55 40	# Auto device ADC Ch2 SE input, fixed 33.3KOhm, ac-coupled, audio band
w a0 76 c0	# Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0	# Power up ADC and MICBIAS

  • Controller mode differential AC-couple recording with PASI

This configuration is for differential audio recording (ADC) with 48 kHz sampling rate, I2S format and 32-bit depth, and MCLK of 12.288 MHz.

##### Record AC-Couple Differential IN1-IN2 path ######
# Controller Mode, I2S, 32-bit, GPIO1 = CCLK from BCLK2 @ 12.288 MHz
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10	# configure GPIO1 as input
w a0 0f 20	# Set GPIO1=CCLK
w a0 10 50    # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 70	# PASI I2S, 32-bit format
w a0 1e 20	# PASI Ch1 on Left slot 0
w a0 1f 30	# PASI Ch2 on Right slot 0
w a0 32 50	# PASI Fs=48KHz with auto clock configuration
w a0 34 48	# PLL always enabled with fractional allowed and from fixed clk frequency
w a0 37 30	# Use MCLK=12.288 MHz, PASI in controller mode
w a0 38 80	# Use internal BCLK for FSYNC generation in controller mode
w a0 39 40	# Set controller mode BCLK/FSYNC ratio to 64 = h40
w a0 00 01	# Set page 1
w a0 73 d0	# auto device, set MICBIAS = 9V
w a0 00 00	# Set page 0
w a0 50 00	# Auto device ADC Ch1 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 55 00	# Auto device ADC Ch2 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 76 c0	# Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0	# Power up ADC and MICBIAS
  • Target mode digital mic recording with PASI

This configuration is for audio recording (ADC) from 2 digital microphones with a 48 kHz sampling rate, I2S format, and 32-bit depth.

##### Record from DMIC Test ######
# Target Mode, I2S, 32-bit
# Primary ASI only, multiple of 48 kHz Sampling 5 x 5-Q1
# PDMCLK=GPIO1, PDM Data=GPI1
# 
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 0a 41	# Configure GPIO1 as PDMCLK with drive active high and low
w a0 0d 02	# Configure GPI1 as input
w a0 10 50	# Configure DOUT as Primary ASI (PASI) DOUT
w a0 13 cc	# PDM ch 1 data latched on negative edge and ch 2 data latched on positive edge
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 70	# PASI I2S, 32-bit format
w a0 1e 20	# PASI Ch1 on Left slot 0
w a0 1f 30	# PASI Ch2 on Right slot 0
w a0 35 00	# PDM_CLK is 2.8224 MHz or 3.072 MHz
w a0 76 c0	# Enable input Chl and Ch2, disable output channels
w a0 78 80	# Power up ADC
  • Target mode differential AC-couple recording with Secondary Audio Serial Interface (SASI)

This configuration is for differential audio recording (ADC) with a 48 kHz sampling rate, TDM format, and 32-bit depth.

##### Record AC-Couple Differential IN1-IN2 path ######
# Target Mode, TDM, 32 bit
# Secondary ASI only, multiple of 48 kHz Sampling
# GPI2A=Secondary FSYNC, GPIO1=Secondary BCLK, GPO1A=Secondary DOUT, GPI1A=Secondary DIN for 5x5-Q1
# 
w a0 00 00	# Sets page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10	# GPIO1 as input
w a0 0d 03	# GPI1 and GPI2 as input
w a0 0c 70	# GPO1 as Secondary DOUT
w a0 11 22	# Set GPI2A as Secondary FSYNC and GPIO1 as Secondary BCLK
w a0 12 60	# Set GPI1A as Secondary DIN
w a0 18 80	# Disable Primary ASI
w a0 34 44	# SASI BCLK is the input clock source
w a0 00 03	# Sets page 3
w a0 1e 20	# SASI Ch1 on slot 0
w a0 1f 21	# SASI Ch2 on slot 1 
w a0 00 01	# Set page 1
w a0 73 d0	# auto device, set MICBIAS = 9V
w a0 00 00	# Sets page 0 
w a0 50 00	# Auto device ADC Ch1 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 55 00	# Auto device ADC Ch2 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 76 C0	# Enable Input Ch1 and Ch2, disable output channels
w a0 78 A0	# Power up ADC and MICBIAS
  • Target mode differential DC-couple recording with PASI

This configuration is for differential audio recording (ADC) with a 48 kHz sampling rate, I2S format, and 32-bit depth.

##### Record DC-Couple IN1-IN2 path ######
# Target Mode, I2S, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 10 50	# Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 70	# PASI I2S, 32-bit format
w a0 1e 20	# PASI Ch1 on Left slot 0
w a0 1f 30	# PASI Ch2 on Right slot 0
w a0 00 01	# Set page 1
w a0 73 d0	# auto device, set MICBIAS = 9V
w a0 00 00	# Set page 0
w a0 50 04	# Auto device ADC Ch1 DIFF input, fixed 33.3KOhm, ac/dc-coupled, audio band
w a0 55 04	# Auto device ADC Ch2 DIFF input, fixed 33.3KOhm, ac/dc-coupled, audio band
w a0 76 c0	# Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0	# Power up ADC and MICBIAS
  • Target mode playback to differential LINEOUT with PASI

This configuration is for differential audio playback (DAC) with a 48 kHz sampling rate, TDM format, and 32-bit depth.

##### Playback Differential LINEOUT Path ######
# Target Mode, TDM, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 11 80	# Enable PASI DIN
w a0 19 00	# 1 data inputs and 1 data outputs for PASI
w a0 1a 30	# PASI TDM, 32-bit format
w a0 28 20	# PASI DIN Ch1 on TDM slot 0
w a0 29 21	# PASI DIN Ch2 on TDM slot 1
w a0 64 20	# Configure OUT1P/M as differential from DAC1
w a0 65 20	# Configure OUT1P LINEOUT 0dB audio band
w a0 66 20	# Configure OUT1M LINEOUT 0dB 2Vrms Differential 
w a0 6b 20	# Configure OUT2P/M as differential from DAC2
w a0 6c 20	# Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20	# Configure OUT2M LINEOUT 0dB 2Vrms Differential 
w a0 76 0c	# Disable all input channels and enable output channel 1 and 2
w a0 78 40	# Power up all DAC channel
  • Target mode playback to single-ended LINEOUT with PASI

This configuration is for single-ended mono audio playback (DAC) with a 48 kHz sampling rate, TDM format, and 32-bit depth.

##### Playback Single-Ended Mono LINEOUT Path ######
# Target Mode, TDM, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 11 80	# Enable PASI DIN
w a0 19 00	# 1 data inputs and 1 data outputs for PASI
w a0 1a 30	# PASI TDM, 32-bit format
w a0 28 20	# PASI DIN Ch1 on TDM slot 0
w a0 29 21	# PASI DIN Ch2 on TDM slot 1
w a0 64 28	# Configure OUT1P as mono single-ended from DAC1
w a0 65 20	# Configure OUT1P LINEOUT 0dB audio band
w a0 66 20	# Configure 2Vrms Differential 
w a0 6b 28	# Configure OUT2P as mono single-ended from DAC2
w a0 6c 20	# Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20	# Configure 2Vrms Differential 
w a0 76 0c	# Disable all input channels and enable output channel 1 and 2
w a0 78 40	# Power up all DAC channel
  • Target mode playback to differential LINEOUT with SASI

This configuration is for differential audio playback (DAC) with a 48 kHz sampling rate, TDM format, and 32-bit depth.

##### Playback Differential LINEOUT Path ######
# Target Mode, TDM, 32 bit
# Secondary ASI only, multiple of 48 kHz Sampling
# GPI2A = Secondary FSYNC, GPIO1 = Secondary BCLK, GPI1A = Secondary DIN, GPO1A=Secondary DOUT for 5x5-Q1
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10	# GPIO1 as input
w a0 0d 03	# GPI1 and GPI2 as input
w a0 0c 70	# GPO1 as Secondary DOUT
w a0 11 22	# Set GPI2A as Secondary FSYNC and GPIO1 as Secondary BCLK
w a0 12 60	# Set GPI1A as Secondary DIN
w a0 18 80	# Disable Primary ASI
w a0 34 44	# SASI BCLK is the input clock source
w a0 19 00	# 1 data input and 1 data output for SASI
w a0 00 03	# Set page 3
w a0 1a 30	# SASI TDM, 32 bit format
w a0 28 20	# SASI DIN Ch1 on TDM slot 0
w a0 29 21	# SASI DIN Ch2 on TDM slot 1
w a0 00 00	# Set page 0
w a0 64 20	# Configure OUT1P/M as differential from DAC1
w a0 65 20	# Configure OUT1P LINEOUT 0dB audio band
w a0 66 20	# Configure OUT1M LINEOUT 0dB 2Vrms Differential 
w a0 6b 20	# Configure OUT2P/M as differential from DAC2
w a0 6c 20	# Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20	# Configure OUT2M LINEOUT 0dB 2Vrms Differential 
w a0 76 0c	# Disable all input channels and enable output channel 1 and 2
w a0 78 40	# Power up all DAC channels
  • Controller mode playback to differential LINEOUT with SASI

This configuration is for differential audio playback (DAC) with a 44.1 kHz sampling rate, TDM format 32-bit depth, and MCLK of 12.288 MHz.

##### Playback Differential LINEOUT Path ######
# Controller Mode MCLK = 12.288 MHz, TDM, 32-bit
# Secondary ASI only, multiple of 44.1 kHz Sampling
# GPIO1=Secondary FSYNC, GPI2A=CCLK Input, GPI1A=Secondary DIN, GPO1A=Secondary BCLK for 5 x 5 - Q1
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 0a a0	# GPIO1 as Secondary FSYNC output
w a0 0d 03	# GPI1 and GPI2 as input
w a0 0c 90	# GPO1A as Secondary BCLK output
w a0 0f 40	# GPI2A as CCLK input
w a0 11 14	# GPIO1 as Secondary FSYNC
w a0 12 60	# Set GPI1A as Secondary DIN
w a0 18 80	# Disable Primary ASI
w a0 32 00	# Auto clock configuration
w a0 33 50	# SASI Fs = 48 kHz (41895-49440) with Auto clock configuration
w a0 34 48	# PLL always enabled with fractional allowed and from fixed clk frequency
w a0 36 00	# auto detect the ratio
w a0 37 29	# Use MCLK=12.288 MHz, SASI in controller configuration with rate multiple of 44.1 kHz
w a0 3a 81	# Use internal BCLK for FSYNC generation for SASI, BCLK/FSYNC ratio=256
w a0 3b 00	# use BCLK/FSYNC ratio of 256 for SASI
w a0 00 03	# Set page 3
w a0 1a 30	# SASI TDM, 32 bit format
w a0 28 20	# SASI DIN Ch1 on TDM slot 0
w a0 29 21	# SASI DIN Ch2 on TDM slot 1
w a0 00 00	# Set page 0
w a0 64 20	# Configure OUT1P/M as differential from DAC1
w a0 65 20	# Configure OUT1P LINEOUT 0dB audio band
w a0 66 20	# Configure OUT1M LINEOUT 0dB 2Vrms Differential 
w a0 6b 20	# Configure OUT2P/M as differential from DAC2
w a0 6c 20	# Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20	# Configure OUT2M LINEOUT 0dB 2Vrms Differential 
w a0 76 0c	# Disable all input channels and enable output channel 1 and 2
w a0 78 40	# Power up all DAC channels
  • Target mode playback to differential headphones with PASI

This configuration is for differential audio playback (DAC) with a 48 kHz sampling rate, I2S format, and 32-bit depth.

##### Playback Differential Headphone Path ######
# Target Mode, I2S, 32-bit
# Primary ASI only, multiple of 48 kHz Sampling
# Playback through Stereo OUT1P and OUT2P for Headphone
# 
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 11 80	# Enable PASI DIN
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 70	# PASI I2S, 32 bit format
w a0 28 20	# PASI DIN Ch1 on Left slot 0
w a0 29 30	# PASI DIN Ch2 on Right slot 0
w a0 64 20	# Configure OUT1P/M as differential from DAC1
w a0 65 60	# Configure OUT1P as Headphone 0dB audio band
w a0 66 60	# Configure OUT1M as Headphone 0dB audio band
w a0 6b 20	# Configure OUT2P/M as differential from DAC2
w a0 6c 60	# Configure OUT2P as Headphone 0dB audio band
w a0 6d 60	# Configure OUT2M as Headphone 0dB audio band
w a0 76 0c	# Enable output channel 1 and 2 and disable all input channels
w a0 78 40	# Power up DAC channel
  • Target mode playback to mono single-ended headphones with PASI

This configuration is for mono single-ended audio playback (DAC) with a 48 kHz sampling rate, I2S format, and 16-bit depth.

##### Playback Single-Ended Headphone Path ######
# Target Mode, I2S, 16 bit
# Primary ASI only, multiple of 48 kHz Sampling
# Playback through mono OUT1P and OUT2P for Headphone
# 
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 11 80	# Enable PASI DIN
w a0 19 00	# 1 data input and 1 data output for PASI
w a0 1a 40	# PASI I2S, 16-bit format
w a0 28 20	# PASI DIN Ch1 on Left slot 0
w a0 29 30	# PASI DIN Ch2 on Right slot 0
w a0 64 28	# Configure OUT1P as mono single-ended from DAC1
w a0 65 60	# Configure OUT1P as Headphone 0dB audio band
w a0 66 60	# Configure 2Vrms Differential
w a0 6b 28	# Configure OUT2P as mono single-ended from DAC2
w a0 6c 60	# Configure OUT2P as Headphone 0dB audio band
w a0 6d 60	# Configure 2Vrms Differential
w a0 76 0c	# Enable output channel 1 and 2 and disable all input channels
w a0 78 40	# Power up DAC channel
  • Diagnostic setting

This configuration enables input diagnostic testing; users read the fault detection status from B0_P1_R54 for Ch 1 and B0_P1_R55 for Ch 2.

##### Diagnostic Setting ######
#
w a0 00 00	# Set page 0
w a0 01 01	# Software Reset
w a0 02 09	# Wake up with AVDD > 2v and all VDDIO level
w a0 50 08	# Device set to DC mode
w a0 00 01	# Set page 1
w a0 73 d0	# Set MICBIAS = 9V
w a0 46 80	# Enable IN1P and IN1M Scan for diagnostic
w a0 47 00	# Input terminal short and VBAT_In short threshold 0mV
w a0 48 12	# short to GND and to MICBIAS threshold 60mV
w a0 4a b0	# 16 counts for debounce to filter out false fault detection
w a0 4b 40	# Enable moving average with 0.5 weightage
w a0 00 00	# Set page 0
w a0 76 c0	# Enable ADC channel 1 and channel 2
w a0 78 a0	# Power up ADC and MICBIAS