SLAAEC6A October   2023  – January 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 System Overview
    2. 2.2 Hardware Overview
      1. 2.2.1 AC-MB Settings
        1. 2.2.1.1 Audio Serial Interface Settings
          1. 2.2.1.1.1 USB Mode
          2. 2.2.1.1.2 Optical or Auxiliary Analog Audio Input Mode
          3. 2.2.1.1.3 External Audio Interface Mode
        2. 2.2.1.2 AC-MB Power Supply
      2. 2.2.2 TAx5x1xQ1EVM-K Hardware Settings
        1. 2.2.2.1 TAx5x1x-Q1 EVM Input Hardware Settings
          1. 2.2.2.1.1 Line Inputs
          2. 2.2.2.1.2 On-Board Microphone Input
        2. 2.2.2.2 TAx5x1x-Q1 EVM Output Hardware Settings
          1. 2.2.2.2.1 TAx5x1x-Q1 Analog Audio Output
      3. 2.2.3 Diagnostics Hardware Setup
        1. 2.2.3.1 Short to MICBIAS Setup
        2. 2.2.3.2 Short to VBAT Setup
        3. 2.2.3.3 Shorted Input Pins Setup
        4. 2.2.3.4 Short to GND Setup
      4. 2.2.4 GPIO1 Hardware Configurations
      5. 2.2.5 GPO1A Hardware Configurations
      6. 2.2.6 GPI1A Hardware Configurations
      7. 2.2.7 GPI2A Hardware Configurations
      8. 2.2.8 I2C Address Hardware Configurations
      9. 2.2.9 Audio Serial Interface Hardware Configurations
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 PurePath Console 3 Installation
      1. 3.2.1 USB Audio Setup
    3. 3.3 TAx5x1x-Q1 EVM GUI
      1. 3.3.1 Software Overview
      2. 3.3.2 Configuration View
        1. 3.3.2.1 Device Config Tab
        2. 3.3.2.2 Record Config Tab
        3. 3.3.2.3 Playback Config Tab
        4. 3.3.2.4 Audio Serial Bus Tab
          1. 3.3.2.4.1 Configuring Primary Audio Serial Bus
          2. 3.3.2.4.2 Configuring Secondary Audio Serial Bus
          3. 3.3.2.4.3 Example Configuring I2S Interface
        5. 3.3.2.5 GPIO/Interrupts Tab
        6. 3.3.2.6 Advanced Tabs
          1. 3.3.2.6.1 Diagnostic Tab
          2. 3.3.2.6.2 Programmable Biquads Tab
          3. 3.3.2.6.3 Mixer Tab
          4. 3.3.2.6.4 Limiter Tab
      3. 3.3.3 End System Integration View
      4. 3.3.4 Register Map View
      5. 3.3.5 Preset Configuration
      6. 3.3.6 I2C Monitor View
    4. 3.4 Configuration Examples
  10. 4Hardware Design Files
    1. 4.1 TAC5412-Q1 EVM Schematic
    2. 4.2 TAC5411-Q1 EVM Schematic
    3. 4.3 TAC541x-Q1 EVM Board Layout
    4. 4.4 Bill of Materials (BOM)
      1. 4.4.1 TAC5412-Q1 EVM Bill of Materials
      2. 4.4.2 TAC5411-Q1 EVM Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
    2. 5.2 Cable References
  12. 6Revision History

1.1 Introduction

The TAx5x1XQ15B5EVM is an evaluation module (EVM) designed to demonstrate the performance and functionality of the TAx5x1x-Q1 family of devices. This family includes the devices shown in Table 3-2 with differences in performance and function noted. This user's guide describes the functionality of the TAC5412Q15B5EVM-K, TAC5411Q15B5EVM, or TAA5412Q15B5EVM-K evaluation kit.

Table 1-1 TAx5x1x-Q1 Family
DeviceADC DR (dB)DAC DR (dB)Feature
TAC5412-Q1110120Stereo codec
TAC5411-Q1110120Mono codec
TAC5312-Q1102106Stereo codec
TAC5311-Q1102106Mono codec
TAA5412-Q1110NAStereo ADC