SLAAEC8 September   2024

 

  1.   1
  2. 1 Description
  3. 2 Required Peripherals
  4. 3 Compatible Devices
  5. 4 Design Steps
  6. 5 Design Considerations
  7. 6 Software Flow Chart
  8. 7 Application Code
  9. 8 Results
  10. 9 Additional Resources
  11. 10E2E
  12. 11Trademarks

2 Required Peripherals

This application requires seven GPIO pins and GPIO interrupts.

Table 2-1 Required Peripherals
Subblock Functionality Notes
GPIO Pin groups are referred to as INPUT, OUTPUT, and SELECT in code