SLAAEF8 January   2024 MSPM0L1105 , MSPM0L1105

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Function Explanation
  6. 3Single Wire UART
    1. 3.1 Background
  7. 4Power and Communication Logic
  8. 5Software
    1. 5.1 Overall Flowchart
    2. 5.2 IOMUX
    3. 5.3 Power/Communication Software Design
    4. 5.4 Other Resources
  9. 6Hardware
    1. 6.1 Test Results
  10. 7References

IOMUX

As mentioned before, standard UART TXD has a push-pull I/O structure. However, in this application, the UART TXD I/O structure needs to be open-drain. MSPM0’s IOMUX function gives the user an easy way to control the digital I/O outputs. It not only manages the selection of which peripheral function is to be used on a digital I/O, but also provides the controls for the output driver, input path, and the wakeup logic for wakeup from SHUTDOWN mode. Figure 5-2 shows a detailed I/O structure of MSPM0.

GUID-20210310-CA0I-MCL1-STLD-7P1LGF9TQDSL-low.svg Figure 5-2 I/O Pin Structure

Note that not all pins have analog functions, wake-up logic, drive strength control, and pullup or pulldown resistors available. For specific designs, see the device-specific TRM and data sheet. In this TWS reference design, after the UART TXD function is selected for the I/O function, a logic high to Hi-z conversion is made to achieve an open-drain UART TXD. The code for setting up the IOMUX can be seen below, ‘DL_GPIO_HIZ_ENABLE’ will set the I/O structure to open-drain

    DL_GPIO_initPeripheralOutputFunctionFeatures(
            GPIO_UART_L_IOMUX_TX, GPIO_UART_L_IOMUX_TX_FUNC,
            DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_NONE,
            DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_ENABLE
    );