SLAAEF8 January   2024 MSPM0L1105 , MSPM0L1105

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Function Explanation
  6. 3Single Wire UART
    1. 3.1 Background
  7. 4Power and Communication Logic
  8. 5Software
    1. 5.1 Overall Flowchart
    2. 5.2 IOMUX
    3. 5.3 Power/Communication Software Design
    4. 5.4 Other Resources
  9. 6Hardware
    1. 6.1 Test Results
  10. 7References

Power/Communication Software Design

The general-purpose timer (TIMG) is used to mimic the waveform in Figure 5-3. MSPM0L series provides up to four individual timer modules each has extensive event generation capabilities, such as counter overflow, reload, and capture/compare actions for a variety of use cases. In this design, the timer is used as a clock which triggers every 10 ms. The corresponding actions in each time sample can be seen in the figure below. This design successfully generates communication and power waveforms.

GUID-20230912-SS0I-6T8Z-KZNF-V423MBZDSVWV-low.png Figure 5-3 Actions in Each Time Sample and Final Waveform