SLAAEK4 January   2024 MSPM0C1104

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Comparison Between TIMA and TIMG
  6. 3 Use Case - 3 Pairs of Complementary PWM with Deadband Insertion
    1. 3.1 Principle
    2. 3.2 Implement
  7. 4 Use Case - Timing-Critical PWM Control with Shadow Load and Compare
    1. 4.1 Principle
    2. 4.2 Implement
  8. 5 Use Case - Fault Handler
    1. 5.1 Principle
    2. 5.2 Implement
  9. 6 Use Case – PWM Disable with Software Force Output
    1. 6.1 Principle
    2. 6.2 Implement
  10. 7 Use Case - Asymmetric PWM
    1. 7.1 Principle
    2. 7.2 Implement
  11. 8 Use Case – Optimal Interrupt Generation with Repeat Counter
    1. 8.1 Principle
    2. 8.2 Implement
  12. 9 Summary
  13. 10References

8.1 Principle

In TIMA only, the repeat counter is an 8-bit counter that provides the mechanism to suppress unnecessary events and generate real events for optimal interrupt generation. Specifically, the repeat counter can suppress Load, Compare, and Zero events in the case where the timer is generating events that repeat for a known number of cycles, such a periodic PWM output waveform. This prevents generating excessive and unnecessary interrupts every timer period.

To generate optimal Interrupt with repeat counter, TIMA is required. The following is the key feature for the use case.

  • Generate center-aligned or edge-aligned PWMs
  • Configure repeat counter(TIMA only)