SLAAEK4 January   2024 MSPM0C1104

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Comparison Between TIMA and TIMG
  6. 3 Use Case - 3 Pairs of Complementary PWM with Deadband Insertion
    1. 3.1 Principle
    2. 3.2 Implement
  7. 4 Use Case - Timing-Critical PWM Control with Shadow Load and Compare
    1. 4.1 Principle
    2. 4.2 Implement
  8. 5 Use Case - Fault Handler
    1. 5.1 Principle
    2. 5.2 Implement
  9. 6 Use Case – PWM Disable with Software Force Output
    1. 6.1 Principle
    2. 6.2 Implement
  10. 7 Use Case - Asymmetric PWM
    1. 7.1 Principle
    2. 7.2 Implement
  11. 8 Use Case – Optimal Interrupt Generation with Repeat Counter
    1. 8.1 Principle
    2. 8.2 Implement
  12. 9 Summary
  13. 10References

4.2 Implement

The shadow load feature allows holding the update of load values until a zero event occurs. If the TIMx module has a shadow load feature, there is an internal shadow register for the load value (TIMx.LOAD). The shadow register can update the load value at a zero event.

For up-counting mode and up or down counting mode, note that a shadow load is necessary. A shadow load can make sure that TIMx counts up to the load value before the zero event, or else the load value can update immediately and cause incorrect timings.

When shadow compare is enabled for updating the capture or compare register (TIMx.CC), the value written to the respective compare register is first stored in a shadow compare register and then transferred to the compare register at different events. User can also configure to update the CC action at different events.

Figure 8-9 shows an example of how shadow load and shadow compare takes effect at the zero event for both the TIMx.LOAD and TIMx.CC value in up/down counting mode.

GUID-9858B3B6-97BD-4C16-BA83-83B55E3B2337-low.svg Figure 4-1 Shadow Load and Shadow Compare Taking Effect at Zero Event in Up or Down Mode

To accelerate development, please refer to the following resources.