SLAAEM7 September   2024 TAS2120 , TAS2320

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Application Schematics
    1. 2.1 Recommended Component Ratings
    2. 2.2 Reference Schematic
  6. 3Design Guidelines
    1. 3.1  VDD Pin
    2. 3.2  PVDD Pin
    3. 3.3  GREG Pin
    4. 3.4  SW Pin
    5. 3.5  VBAT Pin
    6. 3.6  OUT_P and OUT_N Pins
      1. 3.6.1 Optional EMI Filter on Output
    7. 3.7  IOVDD Pin
    8. 3.8  DREG Pin
    9. 3.9  Digital I/O Pins
    10. 3.10 Ground Pins
    11. 3.11 HW Selection Pins
  7. 4EMI Specific Guidelines
  8. 5Summary
  9. 6References

3.10 Ground Pins

The device contains multiple ground pins, which need to be connected to the ground planes in the PCB. While connecting the pins, the following guidelines must be taken into consideration:

  • GND pin is used for the analog and digital grounds. This pin must to be connected independently to the PCB ground plane using vias. Avoid shorting this pin to other GND pins at the top layer, to avoid common inductance to PCB ground.
  • BGND pin refers to the boost converter, and PGND pin refers to the Class-D power stage. These pins need to be shorted together on the top layer of the PCB, and then routed to the PCB ground plane using individual vias.
  • Avoid shorting the BGND or PGND pins to the other GND pins of the device in the top layer, to avoid common inductance to the PCB ground.
Connection of Ground Pins to PCB GND PlaneFigure 3-18 Connection of Ground Pins to PCB GND Plane
Connection of Device GND PinsFigure 3-19 Connection of Device GND Pins