SLAAEM7 September   2024 TAS2120 , TAS2320

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Application Schematics
    1. 2.1 Recommended Component Ratings
    2. 2.2 Reference Schematic
  6. 3Design Guidelines
    1. 3.1  VDD Pin
    2. 3.2  PVDD Pin
    3. 3.3  GREG Pin
    4. 3.4  SW Pin
    5. 3.5  VBAT Pin
    6. 3.6  OUT_P and OUT_N Pins
      1. 3.6.1 Optional EMI Filter on Output
    7. 3.7  IOVDD Pin
    8. 3.8  DREG Pin
    9. 3.9  Digital I/O Pins
    10. 3.10 Ground Pins
    11. 3.11 HW Selection Pins
  7. 4EMI Specific Guidelines
  8. 5Summary
  9. 6References

3.11 HW Selection Pins

TAS2X20 supports hardware control mode, which is controlled by a series of resistors connected to IOVDD, VBAT or GND depending on the required function as described in Table 2-2. These resistors must be placed as close to the IC as possible to reduce the parasitic capacitance between the IC pin and the resistor connection point. Follow the table below for specific tolerances for each of the resistor value cases.

Table 3-1 Component Ratings
BOM Resistors Tolerance Temp-co of R Pin Capacitance
0Ω (direct short) <10Ω short N/A

<7.5pF (recommended)

15pF (max)
330Ω

±5% (recommended)

±10% (max)

 <±400ppm/C
1.2kΩ
5kΩ
24kΩ