SLAAEM7 September   2024 TAS2120 , TAS2320

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Application Schematics
    1. 2.1 Recommended Component Ratings
    2. 2.2 Reference Schematic
  6. 3Design Guidelines
    1. 3.1  VDD Pin
    2. 3.2  PVDD Pin
    3. 3.3  GREG Pin
    4. 3.4  SW Pin
    5. 3.5  VBAT Pin
    6. 3.6  OUT_P and OUT_N Pins
      1. 3.6.1 Optional EMI Filter on Output
    7. 3.7  IOVDD Pin
    8. 3.8  DREG Pin
    9. 3.9  Digital I/O Pins
    10. 3.10 Ground Pins
    11. 3.11 HW Selection Pins
  7. 4EMI Specific Guidelines
  8. 5Summary
  9. 6References

4 EMI Specific Guidelines

PCB layout design can considerably improve EMI performance. This section covers some recommendations to consider for EMI constrained applications.

The main source of radiated emissions produced from audio amplifiers is the output Class-D switching. Specifically for TAS2120 and TAS2320, the emissions can be lower at lower power as the Class-D switches from 0V up to the VDD voltage rail. As output power increases the emissions can do as well as the voltage rail swaps to PVDD. During PCB layout design consider the following recommendations to improve the radiated emissions performance.

  • Output traces need to be routed using inner layers. GND shielding is recommended on top and bottom of the layer used for output traces.
  • Use top or bottom layer only if using output filter components like ferrites or inductors and capacitors. Use multiple vias on pad, reduce the copper area on top or bottom layer as much as possible.
  • TAS2120 and TAS2320 feature edge rate control for the Class-D output. For best EMI performance configure the edge rate to the slowest setting (0.5V/ns).
  • If LC filter is needed for more EMI constrained systems, refer to the following documentation with further information on how to select the filter components: