The VDD pin is used to power up various critical analog and digital blocks within the device. The VDD pin also acts as a power source for driving the Class-D output stage at lower power, if and when the device is operating in the Y-bridge mode.

The following guidelines need to be taken into account when routing the VDD pin to the corresponding power source on the PCB:

• When the Y-Bridge is enabled at power levels below the Y-Bridge threshold, the Class-D amplifier draws switching currents from the VDD pin. This current can be in the order of 200mA due to the fast edge rates.
• Any parasitic inductance in the path between the VDD pin and the corresponding power source results in significant voltage ripple on the pin, due to the L.dI/dT inductive kickback to the switching currents. This effect can potentially impact the performance and functionality of the device.
• Decoupling the VDD pin with a capacitor of value ≥ 2.2µF to the GND pin is recommended. This capacitor needs to be placed as close to the VDD pin as possible in the same layer.
• The decoupling capacitor must have the lowest possible parasitic inductance (ESL). Using a 0201 package capacitor is recommended.
• In case of space constraints in the PCB, place the capacitor such that the top plate connects directly to the VDD pin, and the bottom plate is connected to the PCB ground plane using multiple vias (a minimum of 3 vias is recommended).

Figure 3-1 Placement of VDD Decoupling Capacitor

Figure 3-2 Routing from VDD