6.3 Recommended Operating Conditions
|
MIN |
NOM |
MAX |
UNIT |
AVDD |
Analog supply voltage |
3 |
3.3 |
3.6 |
V |
DVDD |
Digital supply voltage |
3 |
3.3 |
3.6 |
V |
|
Output voltage compliance range(1) |
–1 |
|
1.25 |
V |
|
Clock input frequency |
|
|
275 |
MHz |
TA |
Operating free-air temperature |
–40 |
|
85 |
°C |
(1) The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown, resulting in reduced reliability of the DAC5652A device. The upper limit of the output compliance is determined by the load resistors and full-scale output current. Exceeding the upper limit adversely affects distortion performance and integral nonlinearity.