SLAS789D June 2014 – August 2018 MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR59891 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
PRODUCTION DATA.
TA0 and TA1 are 16-bit timers/counters (Timer_A type) with three capture/compare registers each. TA0 and TA1 can support multiple capture/compares, PWM outputs, and interval timing (see Table 6-12 and Table 6-13). TA0 and TA1 have extensive interrupt capabilities. Interrupts can be generated from the counter on overflow conditions and from each of the capture/compare registers.
INPUT PORT PIN | DEVICE INPUT SIGNAL | MODULE INPUT SIGNAL | MODULE BLOCK | MODULE OUTPUT SIGNAL | DEVICE OUTPUT SIGNAL | OUTPUT PORT PIN |
---|---|---|---|---|---|---|
P1.2 or P6.7 or P7.0 | TA0CLK | TACLK | Timer | N/A | N/A | |
ACLK (internal) | ACLK | |||||
SMCLK (internal) | SMCLK | |||||
P1.2 or P6.7 or P7.0 | TA0CLK | INCLK | ||||
P1.5 | TA0.0 | CCI0A | CCR0 | TA0 | TA0.0 | P1.5 |
P7.1 or P10.1 | TA0.0 | CCI0B | P7.1 | |||
DVSS | GND | P10.1 | ||||
DVCC | VCC | |||||
P1.0 or P1.6 or P7.2 or P7.6 | TA0.1 | CCI1A | CCR1 | TA1 | TA0.1 | P1.0 |
P1.6 | ||||||
COUT (internal) | CCI1B | P7.2 | ||||
P7.6 | ||||||
DVSS | GND | ADC12 (internal)
ADC12SHSx = {1} |
||||
DVCC | VCC | |||||
P1.1 or P1.7 or P7.3 or P7.5 | TA0.2 | CCI2A | CCR2 | TA2 | TA0.2 | P1.1 |
ACLK (internal) | CCI2B | P1.7 | ||||
DVSS | GND | P7.3 | ||||
DVCC | VCC | P7.5 |
INPUT PORT PIN | DEVICE INPUT SIGNAL | MODULE INPUT SIGNAL | MODULE BLOCK | MODULE OUTPUT SIGNAL | DEVICE OUTPUT SIGNAL | OUTPUT PORT PIN |
---|---|---|---|---|---|---|
P1.1 or P4.4 or P5.2 | TA1CLK | TACLK | Timer | N/A | N/A | |
ACLK (internal) | ACLK | |||||
SMCLK (internal) | SMCLK | |||||
P1.1 or P4.4 or P5.2 | TA1CLK | INCLK | ||||
P1.4 or P4.5 | TA1.0 | CCI0A | CCR0 | TA0 | TA1.0 | P1.4 |
P5.2 or P10.2 | TA1.0 | CCI0B | P4.5 | |||
DVSS | GND | P5.2 | ||||
DVCC | VCC | P10.2 | ||||
P1.2 or P3.3 or P4.6 or P5.0 | TA1.1 | CCI1A | CCR1 | TA1 | TA1.1 | P1.2 |
P4.6 | ||||||
COUT (internal) | CCI1B | P3.3 | ||||
P5.0 | ||||||
DVSS | GND | ADC12 (internal)
ADC12SHSx = {4} |
||||
DVCC | VCC | |||||
P1.3 or P4.7 or P5.1 or P7.7 | TA1.2 | CCI2A | CCR2 | TA2 | TA1.2 | P1.3 |
ACLK (internal) | CCI2B | P4.7 | ||||
DVSS | GND | P5.1 | ||||
DVCC | VCC | P7.7 |