SLAS831D March 2014 – March 2018 PCM1860 , PCM1861 , PCM1862 , PCM1863 , PCM1864 , PCM1865
PRODUCTION DATA.
The two fixed function DSPs on chip can have coefficients for filters and mixers programmed to them. This is done indirectly using specific registers on page 1. The devices integrate a memory arbiter that copies the coefficient from the I2C or SPI register space to the appropriate DSP memory address, when the DSP has completed its instructions for that sample. The refresh mechanism for the memory arbiter to update the I2C or SPI register space requires two dummy I2C writes to move from the DSP internal memory, through the arbiter and onwards to be visible in the I2C or SPI register space. See Figure 53
Each 24-bit coefficient can be written once every audio sample. This allows a single sample update of a mixer coefficient, however, biquad coefficients will require multiple audio samples for all of the coefficients to be written. Under such conditions, the device should be muted until all coefficients are written. Otherwise, the biquad could become unstable.
In addition, DSP Internal memory can only be written to when the DSP is provided a clock from either the PLL or an external master clock source. Requesting a WREQ = 1 Register 0x01 of page 0x01 will have no effect, if the DSP is not currently running. This is of relevance if the system is running as a clock slave, and the clocks stop.
For example, to write to these registers, change the energysense resume threshold value to –30 dB (0x040C37)
See SLAC663 for more details.
The internal DSP coefficient memory space is mapped as shown in Table 23.
NAME | COEFFICIENT | ADDRESS | DESCRIPTION |
---|---|---|---|
Mixer-1 | MIX1_CH1L | 0x00 | 4.20 format |
MIX1_CH1R | 0x01 | ||
MIX1_CH2L | 0x02 | ||
MIX1_CH2R | 0x03 | ||
MIX1_I2SL | 0x04 | ||
MIX1_I2SR | 0x05 | ||
Mixer-2 | MIX2_CH1L | 0x06 | 4.20 format |
MIX2_CH1R | 0x07 | ||
MIX2_CH2L | 0x08 | ||
MIX2_CH2R | 0x09 | ||
MIX2_I2SL | 0x0A | ||
MIX2_I2SR | 0x0B | ||
Mixer-3 | MIX3_CH1L | 0x0C | 4.20 format |
MIX3_CH1R | 0x0D | ||
MIX3_CH2L | 0x0E | ||
MIX3_CH2R | 0x0F | ||
MIX3_I2SL | 0x10 | ||
MIX3_I2SR | 0x11 | ||
Mixer-4 | MIX4_CH1L | 0x12 | 4.20 format |
MIX4_CH1R | 0x13 | ||
MIX4_CH2L | 0x14 | ||
MIX4_CH2R | 0x15 | ||
MIX4_I2SL | 0x16 | ||
MIX4_I2SR | 0x17 | ||
Secondary ADC LPF and HPF Coefficients | LPF_B0 | 0x20 | 1.23 format |
LPF_B1 | 0x21 | ||
LPF_B2 | 0x22 | ||
LPF_A1 | 0x23 | ||
LPF_A2 | 0x24 | ||
HPF_B0 | 0x25 | ||
HPF_B1 | 0x26 | ||
HPF_B2 | 0x27 | ||
HPF_A1 | 0x28 | ||
HPF_A2 | 0x29 | ||
Energysense | Loss_threshold | 0x2C | 1.23 format |
Resume_threshold | 0x2D |