SLASE58E February 2016 – December 2019 MSP430FR2310 , MSP430FR2311
PRODUCTION DATA.
Figure 6-6 shows the port diagram. Table 6-44 summarizes the selection of the port functions.
NOTE:
Functional representation only.PIN NAME (P2.x) | x | FUNCTION | CONTROL BITS AND SIGNALS(1) | |
---|---|---|---|---|
P2DIR.x | P2SELx | |||
P2.0/TB1.1/COUT | 0 | P2.0 (I/O) | I: 0; O: 1 | 00 |
TB1.CCI1A | 0 | 01 | ||
TB1.1 | 1 | |||
COUT | 1 | 10 | ||
P2.1/TB1.2 | 1 | P2.1 (I/O)0 | I: 0; O: 1 | 00 |
TB1.CCI2A | 0 | 01 | ||
TB1.2 | 1 | |||
P2.2/UCB0STE/TB1CLK | 2 | P2.2 (I/O) | I: 0; O: 1 | 00 |
UCB0STE | X | 01 | ||
TB1CLK | 0 | 10 | ||
VSS | 1 | |||
P2.3/UCB0CLK/TB1TRG | 3 | P2.3 (I/O) | I: 0; O: 1 | 00 |
UCB0CLK | X | 01 | ||
TB1TRG | 0 | 10 | ||
P2.4/UCB0SIMO/UCB0SDA | 4 | P2.4 (I/O) | I: 0; O: 1 | 00 |
UCB0SIMO/UCB0SDA | X | 01 | ||
P2.5/UCB0SOMI/UCB0SCL | 5 | P2.5 (I/O) | I: 0; O: 1 | 00 |
UCB0SOMI/UCB0SCL | X | 01 | ||
P2.6/MCLK/XOUT | 6 | P2.6 (I/O) | I: 0; O: 1 | 00 |
MCLK | 1 | 01 | ||
VSS | 0 | |||
XOUT | X | 10 | ||
P2.7/TB0CLK/XIN | 7 | P2.7 (I/O) | I: 0; O: 1 | 00 |
TB0CLK | 0 | 01 | ||
VSS | 1 | |||
XIN | X | 10 |