SLASEE2 February 2018 DAC8771
PRODUCTION DATA.
A large signal step on the output pin IOUT (for example 0 mA to 24 mA) with a load of 1 KΩ would require that the respective Buck-Boost converter change the output voltage on the VPOS_IN pin from 4.0 V to 27 V. Thus, the current output settling time will be dominated by the settling time of the VPOS_IN voltage. A trade off can be made to reduce the settling time at the expense of power saving by increasing the minimum voltage that the respective Buck-Boost converter generates on the positive output.
The DAC8771 implements a configurable clamp feature. This feature allows multiple modes of operation based on CCLP[1:0] and HSCLMP bits (Configuration Buck-Boost Register (address = 0x07) [reset = 0x0000]).