SLASEJ4C April 2017 – February 2023 PGA460
PRODUCTION DATA
As described in the GUID-048C59B8-7835-47F1-BC5D-944AF6850CC6.html#TITLE-SLASEC8X3845 section, the PGA460 device begins the response transmission with a diagnostic data field. This field contains UART communication error bits. If a particular bit is set to 1 then the associated communication error has occurred sometime between the last response operation and the current response operation. After a response operation is performed, the communication error bits are cleared. The diagnostic field is included in the peripheral generated checksum calculation. #X6748 shows the diagnostic data field.
Table 7-4 lists the diagnostic data error status bits.
The error status[7:6] bits in the diagnostic field are set to 01b so that the bit time transmitted by the peripheral can be easily measured. If more error status is required, these bit locations can be used to transmit the additional error status.
BIT | UART_DIAG = 0 | UART_DIAG = 1 |
---|---|---|
Error status [0] | PGA460 Device Busy | |
Error status [1] | Sync field bit rate too high (>115200 bps) | Threshold settings CRC error |
Sync field bit rate too low (>115200 bps) | ||
Error status [2] | Consecutive sync field bit widths do not match | Frequency diagnostics error |
Error status [3] | Invalid checksum received from controller (essentially a calculated peripheral checksum does not match the checksum transmitted by the controller) | Voltage diagnostics error |
Error status [4] | Invalid command sent from controller | Logic 0 |
Error status [5] | General communication error:
| EEPROM CRC error or TRM CRC error |
Error status [6] | Logic 1 | |
Error status [7] | Logic 0 |