SLASET3D April 2019 – January 2024 TAS2563
PRODUCTION DATA
PIN | MAX PARASITIC INDUCTANCE | LAYOUT RECOMMENDATIONS |
---|---|---|
BGND, GND, PGND, GNDD | 150 pH | Short BGND, GND, GNDD, PGDN below the package and connect them to PCB ground plane strongly through multiple vias. Minimize inductance as much as possible |
DREG | 500 pH | Bypass to GND with capacitor recommended in Table 8-1. Do not connect to external load. Both ends of decoupling cap should see as low inductance as possible between this pin and gnd pins. |
GREG | 200 pH | Connect it to PVDD with a star connection and not to boost plane with recommended in Table 8-1. Do not connect to external load. |
PVDD | 100 pH | Short it to VBST(boost) plane through strong conneciton. Connect it to GREG with a star connection and not to boost plane. |
SW | Connect to VBAT with boost inductor recommended in Table 8-1. Reduce parasitic capacitor and resistance for efficiency. Boost inductor should be as close as possible to the SW pin. Inductor should be connected to SW through thick plane. Traces should support currents up to device over-current limit. | |
VBAT | 500 pH | Bypass to GND with capacitor recommended in Table 8-1. Should be connected to inductor through thick plane. Both ends of decoupling capacitor should see as low inductance as possible between VBAT pin and PGND pin. |
VBST | 100 pH | Do not connect to external load. Bypass to GND with capacitor recommended in Table 8-1. Connect to PVDD through thick plane. Both ends of decoupling capacitor should see as low inductance as possible between VBST pin and BGND pin. Traces should support currents up to device over-current limit. |
VDD | 200 pH | Bypass to GND with capacitor recommended in Table 8-1. Both the end of decoupling cap should see as low inductance as possible between this pin and GND pin |