7 Register Map

Table 7-1 Register Map

ADDR (HEX)	REGISTER	TYPE	RESET (HEX)	BIT DESCRIPTION
ADDR (HEX)	REGISTER	TYPE	RESET (HEX)	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00	NOP	W	0000	NOP[15:0]
01	DEVICE_ID	R	8516	CHIP_ID[15:0]
02	VERSION_ID	R	0000	RESERVED													VERSION_ID[2:0]
03	PWDWN	R/W	FFFF	OUT15_ PWDWN	OUT14_ PWDWN	OUT13_ PWDWN	OUT12_ PWDWN	OUT11_ PWDWN	OUT10_ PWDWN	OUT9_ PWDWN	OUT8_ PWDWN	OUT7_ PWDWN	OUT6_ PWDWN	OUT5_ PWDWN	OUT4_ PWDWN	OUT3_ PWDWN	OUT2_ PWDWN	OUT1_ PWDWN	OUT0_ PWDWN
04	DAC_GAIN	R/W	0000	RESERVED												OUT_ QUAD3_ GAIN	OUT_ QUAD2_ GAIN	OUT_ QUAD1_ GAIN	OUT_ QUAD0_ GAIN
05	TRIGGER	W	0000	LDAC_ OUT15_ OUT14	LDAC_ OUT13_ OUT12	LDAC_ OUT11_ OUT10	LDAC_ OUT9_ OUT8	LDAC_ OUT7_ OUT6	LDAC_ OUT5_ OUT4	LDAC_ OUT3_ OUT2	LDAC_ OUT1_ OUT0	RESERVED				SOFT_RST[3:0]
06	BCAST_ DAC_ DATA	R/W	0000	DATA[15:0]
07	STATUS	R	4008	RESERVED															GDAC_ SC_STS
08	SDO_EN	R/W	0000	RESERVED														FSDO	SDO_EN
09	GEN_CONFIG	R/W	0014	RESERVED										FLEXIO_ OUT_ POL	FLEXIO_ OUT_ ODE	RESERVED	REF_ PWDWN	RESERVED	FLEXIO_ FUNC
0A	SYNC_ EN	R/W	0000	OUT15_ SYNC_ EN	OUT14_ SYNC_ EN	OUT13_ SYNC_ EN	OUT12_ SYNC_ EN	OUT11_ SYNC_ EN	OUT10_ SYNC_ EN	OUT9_ SYNC_ EN	OUT8_ SYNC_ EN	OUT7_ SYNC_ EN	OUT6_ SYNC_ EN	OUT5_ SYNC_ EN	OUT4_ SYNC_ EN	OUT3_ SYNC_ EN	OUT2_ SYNC_ EN	OUT1_ SYNC_ EN	OUT0_ SYNC_ EN
0B	BCAST_ EN	R/W	FFFF	OUT15_ BCAST_ EN	OUT14_ BCAST_ EN	OUT13_ BCAST_ EN	OUT12_ BCAST_ EN	OUT11_ BCAST_ EN	OUT10_ BCAST_ EN	OUT9_ BCAST_ EN	OUT8_ BCAST_ EN	OUT7_ BCAST_ EN	OUT6_ BCAST_ EN	OUT5_ BCAST_ EN	OUT4_ BCAST_ EN	OUT3_ BCAST_ EN	OUT2_ BCAST_ EN	OUT1_ BCAST_ EN	OUT0_ BCAST_ EN
0C	CLEAR	R/W	0000	OUT15_ SW_ CLR	OUT14_ SW_ CLR	OUT13_ SW_ CLR	OUT12_ SW_ CLR	OUT11_ SW_ CLR	OUT10_ SW_ CLR	OUT9_ SW_ CLR	OUT8_ SW_ CLR	OUT7_ SW_ CLR	OUT6_ SW_ CLR	OUT5_ SW_ CLR	OUT4_ SW_ CLR	OUT3_ SW_ CLR	OUT2_ SW_ CLR	OUT1_ SW_ CLR	OUT0_ SW_ CLR
0D	CLEAR_PIN_ MASK	R/W	0000	OUT15_ HW_ CLR_ MASK	OUT14_ HW_ CLR_ MASK	OUT13_ HW_ CLR_ MASK	OUT12_ HW_ CLR_ MASK	OUT11_ HW_ CLR_ MASK	OUT10_ HW_ CLR_ MASK	OUT9_ HW_ CLR_ MASK	OUT8_ HW_ CLR_ MASK	OUT7_ HW_ CLR_ MASK	OUT6_ HW_ CLR_ MASK	OUT5_ HW_ CLR_ MASK	OUT4_ HW_ CLR_ MASK	OUT3_ HW_ CLR_ MASK	OUT2_ HW_ CLR_ MASK	OUT1_ HW_ CLR_ MASK	OUT0_ HW_ CLR_ MASK
0E	BCAST_CLR_ DATA	R/W	0000	DATA[15:0]
0F	RESET_ FLAGS	W	000F	RESERVED												VDD_ COLLAPSE_FLAG	RSTPIN_ FLAG	VIO_FLAG	PORBASE_FLAG
10	OUT0_ BUFFER_ CODE	R/W	0000	DATA[15:0]
11	OUT1_ BUFFER_ CODE	R/W	0000	DATA[15:0]
12	OUT2_ BUFFER_ CODE	R/W	0000	DATA[15:0]
13	OUT3_ BUFFER_ CODE	R/W	0000	DATA[15:0]
14	OUT4_ BUFFER_ CODE	R/W	0000	DATA[15:0]
15	OUT5_ BUFFER_ CODE	R/W	0000	DATA[15:0]
16	OUT6_ BUFFER_ CODE	R/W	0000	DATA[15:0]
17	OUT7_ BUFFER_ CODE	R/W	0000	DATA[15:0]
18	OUT8_ BUFFER_ CODE	R/W	0000	DATA[15:0]
19	OUT9_ BUFFER_ CODE	R/W	0000	DATA[15:0]
1A	OUT10_ BUFFER_ CODE	R/W	0000	DATA[15:0]
1B	OUT11_ BUFFER_ CODE	R/W	0000	DATA[15:0]
1C	OUT12_ BUFFER_ CODE	R/W	0000	DATA[15:0]
1D	OUT13_ BUFFER_ CODE	R/W	0000	DATA[15:0]
1E	OUT14_ BUFFER_ CODE	R/W	0000	DATA[15:0]
1F	OUT15_ BUFFER_ CODE	R/W	0000	DATA[15:0]
20	OUT0_ CLEAR_ CODE	R/W	0000	DATA[15:0]
21	OUT1_ CLEAR_ CODE	R/W	0000	DATA[15:0]
22	OUT2_ CLEAR_ CODE	R/W	0000	DATA[15:0]
23	OUT3_ CLEAR_ CODE	R/W	0000	DATA[15:0]
24	OUT4_ CLEAR_ CODE	R/W	0000	DATA[15:0]
25	OUT5_ CLEAR_ CODE	R/W	0000	DATA[15:0]
26	OUT6_ CLEAR_ CODE	R/W	0000	DATA[15:0]
27	OUT7_ CLEAR_ CODE	R/W	0000	DATA[15:0]
28	OUT8_ CLEAR_ CODE	R/W	0000	DATA[15:0]
29	OUT9_ CLEAR_ CODE	R/W	0000	DATA[15:0]
2A	OUT10_ CLEAR_ CODE	R/W	0000	DATA[15:0]
2B	OUT11_ CLEAR_ CODE	R/W	0000	DATA[15:0]
2C	OUT12_ CLEAR_ CODE	R/W	0000	DATA[15:0]
2D	OUT13_ CLEAR_ CODE	R/W	0000	DATA[15:0]
2E	OUT14_ CLEAR_ CODE	R/W	0000	DATA[15:0]
2F	OUT15_ CLEAR_ CODE	R/W	0000	DATA[15:0]
31	GPIO_ DATA	R/W	0001	RESERVED															GPIO
32	DAC_ STATUS	R	0000	OUT15_ SC_ STS	OUT14_ SC_ STS	OUT13_ SC_ STS	OUT12_ SC_ STS	OUT11_ SC_ STS	OUT10_ SC_ STS	OUT9_ SC_ STS	OUT8_ SC_ STS	OUT7_ SC_ STS	OUT6_ SC_ STS	OUT5_ SC_ STS	OUT4_ SC_ STS	OUT3_ SC_ STS	OUT2_ SC_ STS	OUT1_ SC_ STS	OUT0_ SC_ STS