SLASF86B
October 2023 – May 2024
MSPM0G3105-Q1
,
MSPM0G3106-Q1
,
MSPM0G3107-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Functional Block Diagram
5
Device Comparison
6
Pin Configuration and Functions
6.1
Pin Diagrams
6.2
Pin Attributes
6.3
Signal Descriptions
6.4
Connections for Unused Pins
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current Characteristics
7.5.1
RUN/SLEEP Modes
7.5.2
STOP/STANDBY Modes
7.5.3
SHUTDOWN Mode
7.6
Power Supply Ramp
7.6.1
POR and BOR
7.7
Flash Memory Characteristics
7.8
Timing Characteristics
7.9
Clock Specifications
7.9.1
System Oscillator (SYSOSC)
7.9.1.1
SYSOSC Typical Frequency Accuracy
7.9.2
Low Frequency Oscillator (LFOSC)
7.9.3
System Phase Lock Loop (SYSPLL)
7.9.4
Low Frequency Crystal/Clock
7.9.5
High Frequency Crystal/Clock
7.10
Digital IO
7.10.1
Electrical Characteristics
7.10.2
Switching Characteristics
7.11
Analog Mux VBOOST
7.12
ADC
7.12.1
Electrical Characteristics
7.12.2
Switching Characteristics
7.12.3
Linearity Parameters
7.13
Typical Connection Diagram
7.14
Temperature Sensor
7.15
VREF
7.15.1
Voltage Characteristics
7.15.2
Electrical Characteristics
7.16
GPAMP
7.16.1
Electrical Characteristics
7.16.2
Switching Characteristics
7.17
I2C
7.17.1
I2C Timing Diagram
7.17.2
I2C Characteristics
7.17.3
I2C Filter
7.18
SPI
7.18.1
SPI
7.18.2
SPI Timing Diagram
7.19
UART
7.20
TIMx
7.21
TRNG
7.21.1
TRNG Electrical Characteristics
7.21.2
TRNG Switching Characteristics
7.22
Emulation and Debug
7.22.1
SWD Timing
8
Detailed Description
8.1
CPU
8.2
Operating Modes
8.2.1
Functionality by Operating Mode (MSPM0G310x)
8.3
Power Management Unit (PMU)
8.4
Clock Module (CKM)
8.5
DMA
8.6
Events
8.7
Memory
8.7.1
Memory Organization
8.7.2
Peripheral File Map
8.7.3
Peripheral Interrupt Vector
8.8
Flash Memory
8.9
SRAM
8.10
GPIO
8.11
IOMUX
8.12
ADC
8.13
Temperature Sensor
8.14
VREF
8.15
GPAMP
8.16
TRNG
8.17
AES
8.18
CRC
8.19
UART
8.20
I2C
8.21
SPI
8.22
CAN-FD
8.23
WWDT
8.24
RTC
8.25
Timers (TIMx)
8.26
Device Analog Connections
8.27
Input/Output Diagrams
8.28
Serial Wire Debug Interface
8.29
Bootstrap Loader (BSL)
8.30
Device Factory Constants
8.31
Identification
9
Applications, Implementation, and Layout
9.1
Typical Application
9.1.1
Schematic
10
Device and Documentation Support
10.1
Getting Started and Next Steps
10.2
Device Nomenclature
10.3
Tools and Software
10.4
Documentation Support
10.5
Support Resources
10.6
Trademarks
10.7
Electrostatic Discharge Caution
10.8
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
1
Features
Core
Arm®
32-bit
Cortex®
-M0+ CPU with memory protection unit, frequency up to 80MHz
Functional Safety Quality-Managed
Functional Safety Manual
and
FMEDA
available to aid in functional safety system design
Operating characteristics
Extended temperature: –40°C up to
125°C
Wide supply voltage range: 1.62V to 3.6V
Memories
Up to 128KB of flash memory with built-in error correction code (ECC)
Up to 32KB of SRAM with hardware parity
High-performance analog peripherals
Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADCs) with up to
17
external channels
14-bit effective resolution at 250ksps with hardware averaging
One general-purpose amplifier (GPAMP)
Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
Integrated temperature sensor
Integrated supply monitor
Optimized low-power modes
RUN: 101µA/MHz (CoreMark)
SLEEP: 487µA at 4MHz
STOP: 47µA at 32kHz
STANDBY: 1.5µA with RTC and SRAM retention
SHUTDOWN: 80nA with IO wakeup capability
Intelligent digital peripherals
7-channel DMA controller
Two 16-bit advanced control timers support dead band insertion and fault handling
Seven timers supporting up to 22 PWM channels
One 16-bit general purpose timer
One 16-bit general purpose timer supports QEI
Two 16-bit general-purpose timers support low-power operation in STANDBY mode
One 32-bit general-purpose timer
Two 16-bit advanced timers with deadband
Two window-watchdog timers
RTC with alarm and calendar mode
Enhanced communication interfaces
Four UART interfaces; one supports LIN, IrDA, DALI, Smart Card, Manchester, and three support low-power operation in STANDBY mode
Two I
2
C interfaces supporting up to FM+ (1Mbit/s), SMBus, PMBus, and wakeup from STOP mode
Two SPIs, one SPI supports up to 32Mbits/s
One Controller Area Network (CAN) interface supports CAN 2.0 A or B and CAN-FD
Clock system
Internal 4MHz to 32MHz oscillator with up to ±1.2% accuracy (SYSOSC)
Phase-locked loop (PLL) up to 80MHz
Internal 32kHz oscillator (LFOSC) with ±3% accuracy
External 4MHz to 48MHz crystal oscillator (HFXT)
External 32kHz crystal oscillator(LFXT)
External clock input
Data integrity and encryption
Cyclic redundancy checker (CRC-16, CRC-32)
True random number generator (TRNG)
AES encryption with 128- or 256-bit key
Flexible I/O features
Up to
60
GPIOs
Two 5V-tolerant IOs
Two high-drive IOs with 20mA drive strength
Development support
2-pin serial wire debug (SWD)
Package options
64-pin LQFP
48-pin LQFP, VQFN
32-pin VQFN
32 and 28-pin VSSOP
20-pin VSSOP
Family members
(also see
Device Comparison
)
MSPM0G3105: 32KB flash, 16KB RAM
MSPM0G3106: 64KB flash, 32KB RAM
MSPM0G3107: 128KB flash, 32KB RAM
Development kits and software
(also see
Tools and Software
)
LP-MSPM0G3507
LaunchPad™
development kit
MSP Software Development Kit (SDK)
Automotive qualification
AEC-Q100 Grade 1
32-pin and 48-pin QFNs with wettable flanks option