SLASF88B
October 2023 – May 2024
MSPM0G3505-Q1
,
MSPM0G3506-Q1
,
MSPM0G3507-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Functional Block Diagram
5
Device Comparison
6
Pin Configuration and Functions
6.1
Pin Diagrams
6.2
Pin Attributes
6.3
Signal Descriptions
6.4
Connections for Unused Pins
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current Characteristics
7.5.1
RUN/SLEEP Modes
7.5.2
STOP/STANDBY Modes
7.5.3
SHUTDOWN Mode
7.6
Power Supply Sequencing
7.6.1
Power Supply Ramp
7.6.1.1
POR and BOR
7.7
Flash Memory Characteristics
7.8
Timing Characteristics
7.9
Clock Specifications
7.9.1
System Oscillator (SYSOSC)
7.9.2
SYSOSC Typical Frequency Accuracy
7.9.2.1
Low Frequency Oscillator (LFOSC)
7.9.3
System Phase Lock Loop (SYSPLL)
7.9.4
Low Frequency Crystal/Clock
7.9.5
High Frequency Crystal/Clock
7.10
Digital IO
7.10.1
Electrical Characteristics
7.10.2
Switching Characteristics
7.11
Analog Mux VBOOST
7.12
ADC
7.12.1
Electrical Characteristics
7.12.2
Switching Characteristics
7.12.3
Linearity Parameters
7.13
Typical Connection Diagram
7.14
Temperature Sensor
7.15
VREF
7.15.1
Voltage Characteristics
7.15.2
Electrical Characteristics
7.16
Comparator (COMP)
7.16.1
Comparator Electrical Characteristics
7.17
DAC
7.17.1
DAC_Supply Specifications
7.17.2
DAC Output Specifications
7.17.3
DAC Dynamic Specifications
7.17.4
DAC Linearity Specifications
7.17.5
DAC Timing Specifications
7.18
GPAMP
7.18.1
Electrical Characteristics
7.18.2
Switching Characteristics
7.19
OPA
7.19.1
Electrical Characteristics
7.19.2
Switching Characteristics
7.19.3
PGA Mode
7.20
I2C
7.20.1
I2C Characteristics
7.20.2
I2C Filter
7.20.2.1
I2C Timing Diagram
7.21
SPI
7.21.1
SPI
7.21.2
SPI Timing Diagram
7.22
UART
7.23
TIMx
7.24
TRNG
7.24.1
TRNG Electrical Characteristics
7.24.2
TRNG Switching Characteristics
7.25
Emulation and Debug
7.25.1
SWD Timing
8
Detailed Description
8.1
CPU
8.2
Operating Modes
8.2.1
Functionality by Operating Mode (MSPM0G350x)
8.3
Power Management Unit (PMU)
8.4
Clock Module (CKM)
8.5
DMA
8.6
Events
8.7
Memory
8.7.1
Memory Organization
8.7.2
Peripheral File Map
8.7.3
Peripheral Interrupt Vector
8.8
Flash Memory
8.9
SRAM
8.10
GPIO
8.11
IOMUX
8.12
ADC
8.13
Temperature Sensor
8.14
VREF
8.15
COMP
8.16
DAC
8.17
OPA
8.18
GPAMP
8.19
TRNG
8.20
AES
8.21
CRC
8.22
MATHACL
8.23
UART
8.24
I2C
8.25
SPI
8.26
CAN-FD
8.27
WWDT
8.28
RTC
8.29
Timers (TIMx)
8.30
Device Analog Connections
8.31
Input/Output Diagrams
8.32
Serial Wire Debug Interface
8.33
Bootstrap Loader (BSL)
8.34
Device Factory Constants
8.35
Identification
9
Applications, Implementation, and Layout
9.1
Typical Application
9.1.1
Schematic
10
Device and Documentation Support
10.1
Getting Started and Next Steps
10.2
Device Nomenclature
10.3
Tools and Software
10.4
Documentation Support
10.5
Support Resources
10.6
Trademarks
10.7
Electrostatic Discharge Caution
10.8
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
7.18
GPAMP