SLASF93A October   2023  – July 2024 MSPM0C1103-Q1 , MSPM0C1104-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
    3. 6.3 Signal Descriptions
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 POR and BOR
      2. 7.6.2 Power Supply Ramp
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 ADC
      1. 7.11.1 Electrical Characteristics
      2. 7.11.2 Switching Characteristics
      3. 7.11.3 Linearity Parameters
      4. 7.11.4 Typical Connection Diagram
    12. 7.12 Temperature Sensor
    13. 7.13 VREF
      1. 7.13.1 Voltage Characteristics
      2. 7.13.2 Electrical Characteristics
    14. 7.14 I2C
      1. 7.14.1 I2C Characteristics
      2. 7.14.2 I2C Filter
      3. 7.14.3 I2C Timing Diagram
    15. 7.15 SPI
      1. 7.15.1 SPI
      2. 7.15.2 SPI Timing Diagrams
    16. 7.16 UART
    17. 7.17 TIMx
    18. 7.18 Windowed Watchdog Characteristics
    19. 7.19 Emulation and Debug
      1. 7.19.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  CPU
    2. 8.2  Operating Modes
      1. 8.2.1 Functionality by Operating Mode (MSPM0C110x)
    3. 8.3  Power Management Unit (PMU)
    4. 8.4  Clock Module (CKM)
    5. 8.5  DMA
    6. 8.6  Events
    7. 8.7  Memory
      1. 8.7.1 Memory Organization
      2. 8.7.2 Peripheral File Map
      3. 8.7.3 Peripheral Interrupt Vector
    8. 8.8  Flash Memory
    9. 8.9  SRAM
    10. 8.10 GPIO
    11. 8.11 IOMUX
    12. 8.12 ADC
    13. 8.13 Temperature Sensor
    14. 8.14 VREF
    15. 8.15 CRC
    16. 8.16 UART
    17. 8.17 SPI
    18. 8.18 I2C
    19. 8.19 WWDT
    20. 8.20 Timers (TIMx)
    21. 8.21 Device Analog Connections
    22. 8.22 Input/Output Diagrams
    23. 8.23 Serial Wire Debug Interface
    24. 8.24 Device Factory Constants
    25. 8.25 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

1 Features

  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1: –40°C to +125°C, TA
  • Core
    • Arm® 32-bit Cortex®-M0+ CPU, frequency up to 24MHz
  • Operating characteristics
    • Extended temperature: –40°C to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 16KB of flash
    • 1KB of SRAM
  • High-performance analog peripherals
    • One analog-to-digital converter (ADC) with up to 10 total external channels, 1.7Msps at 10 bit or 1.5Msps at 12 bit with VDD as the voltage reference
    • Configurable 1.4V or 2.5V internal ADC voltage reference (VREF)
    • Integrated temperature sensor
    • Integrated supply monitor
  • Optimized low-power modes
    • RUN: 87µA/MHz
    • STOP: 609µA at 4MHz, 311µA at 32kHz
    • STANDBY: 5µA with SRAM retention
    • SHUTDOWN: 200nA
  • Intelligent digital peripherals
    • 1-channel DMA controller dedicated for ADC
    • Three timers supporting up to 14 PWM channels
      • One 16-bit advanced timers with deadband support up to 8 PWM channels
      • One 16-bit general purpose timer with 4 capture/compares
      • One 16-bit general purpose timer with 2 capture/compares
    • Windowed watchdog timer
    • BEEPER generating 1kHz, 2kHz, 4kHz, or 8kHz square wave to drive the external beeper
  • Enhanced communication interfaces
    • One UART interface supporting LIN, IrDA, DALI, smart card, Manchester and low-power operation in STANDBY mode
    • One I2C interface supporting FM+ (1Mbps), SMBus, PMBus, and wakeup from STOP mode
    • One SPI supporting up to 12Mbps
  • Clock system
    • Internal 24MHz oscillator with an accuracy from -2% to +1.2% (SYSOSC)
    • Internal 32kHz low-frequency oscillator (LFOSC)
  • Data integrity
    • Cyclic redundancy checker (CRC-16)
  • Flexible I/O features
    • Up to 18 GPIOs
    • Two 5V-tolerant open-drain IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 20-pin VSSOP (DGS)
    • 20-pin WQFN (RUK)
    • 16-pin SOT (DYY)
    • 8-pin SOT (DDF)
    • 8-pin WSON (DSG)
  • Family members (also see Device Comparison)
    • MSPM0C1104: 16KB of flash, 1KB of RAM
    • MSPM0C1103: 8KB of flash, 1KB of RAM
  • Development kits and software (also see Tools and Software)
    • LP-MSPM0C1104 LaunchPad™ development kit
    • MSP Software Development Kit (SDK)