SLASF96 April 2024 AFE20408
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | VDD_ COLLAPSE_ FLAG |
RSTPIN_FLAG | VIO_FLAG | PORBASE_FLAG | |||
R-0h | W-1h | W-1h | W-1h | W-1h | |||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
3 | VDD_COLLAPSE_FLAG | W | 1h | VDD collapse flag. Write to 0 to detect a VDD collapse event, at which time this flag is automatically set to 1. VDD collapse occurs when VDD reaches to within 1V of the VREF voltage. |
2 | RSTPIN_FLAG | W | 1h | RESET pin reset flag. Write to 0 to detect a RESET pin reset event, at which time this flag is automatically set to 1. |
1 | VIO_FLAG | W | 1h | VIO reset flag. Write to 0 to detect a VIO reset event, at which time this flag is automatically set to 1. VIO reset event occurs as a result of VIO dropping below the POR threshold voltage. |
0 | PORBASE_FLAG | W | 1h | POR base flag. Write to 0 to detect a POR-base reset event, at which time this flag is automatically set to 1. POR-base reset event occurs as a result of VDD dropping below the POR threshold voltage. |