The integrated ADC is a high-performance, low-offset, low-drift, delta-sigma ADC designed to support bidirectional current flow at the shunt voltage measurement channel. The measured inputs are selected through the high-voltage input multiplexer to the ADC inputs. The ADC architecture enables lower drift measurement across temperature and consistent offset measurements across the common-mode voltage, temperature, and power supply variations. A low-offset ADC is preferred in current sensing applications to provide a near 0V offset voltage that maximizes the useful dynamic range of the system.

ADC conversion time for each input can be set independently by the CONV_RATE_SENSE, CONV_RATE_ADC, and CONV_RATE_TMP bits in register ADC_CONV_CFG_0 (located in the ADC Configuration register page), in the range of 52µs to 4.122ms. Furthermore, a sample averaging function in the range of 1 × to 1024 × is implemented and can be selected by the AVG_SENSE, AVG_ADC, and AVG_TMP bits in ADC_CONV_CFG_1 register (also located in the ADC Configuration register page).

The device can measure the shunt voltage, bus voltage, and die temperature, or a combination of any based on the selected bits setting in the ADC_CCS_IDS registers (described further in Section 6.3.2.2.1). This permits selecting modes to convert only the shunt voltage or bus voltage to further allow the user to configure the monitoring function to fit the specific application requirements. When no averaging is selected, once an ADC conversion is completed, the converted values are independently updated in the corresponding registers and can be read through the digital interface at the time of conversion end. The conversion time for shunt voltage, bus voltage, and temperature inputs are set independently from 52µs to 4.122ms depending on the values programmed in the ADC_CONV_CFG_0 register. Enabled measurement inputs are converted sequentially so the total time to convert all inputs depends on the conversion time for each input and the number of inputs enabled. When averaging is used, the intermediate values are subsequently stored in an averaging accumulator, and the conversion sequence repeats until the number of averages is reached. After all of the averaging has been completed, the final values are updated in the corresponding registers that can then be read. These values remain in the data output registers until the next fully completed conversion results are ready. In this case, reading the data output registers does not affect a conversion in progress.

The ADC has two conversion modes—auto and direct—set by the CMODE bit in the ADC_GEN_CFG register. In auto-conversion mode, the ADC can continuously convert the input measurements and update the output registers in an indefinite loop. In direct-conversion mode, the ADC converts the input measurements, after which the ADC goes into shutdown mode until another single-shot trigger is generated by writing to the ADC_TRIG bit in the TRIGGER register (located in the global register page). Writing the ADC_TRIG bit interrupts and restarts auto or direct conversions that are in progress. Although the device can be read at any time, and the data from the last conversion remains available, the ADC not ready flag (ADC_READY bit of the GEN_STATUS register, in the global register page) is provided to help coordinate triggered conversions in direct mode. This bit is cleared after all conversions and averaging are completed.

The data stored in each ADC data register can be manually overridden by a previously specified code, bypassing all ADC data conversions. This code can be set by writing to the ADC_BYP register in the ADC Configuration page of the register map. By writing a 1 to the ADC_BYP_EN bit in the GLOBAL_CFG register (located in the global register page), the codes stored in all ADC data registers are overwritten by the specified bypass value.