The AES advanced (AESADV) accelerator module performs encryption and decryption of 128-bit data blocks with a 128-bit or 256-bit key in hardware according to the advanced encryption standard (AES). AES is a symmetric-key block cipher algorithm specified in FIPS PUB 197.
The AESADV accelerator features include:
- AES operation with 128-bit and 256-bit keys
- Key scheduling in hardware
- Enc/decrypt only modes: CBC, CFB-1, CFB-8, CFB-128, OFB-128, CTR/ICM
- Authentication only modes: CBC-MAC, CMAC
- AES-CCM (using AES-CTR mode and AES-CBC-MAC)
- AES-GCM (using AES-CTR mode and GHASH, supports basic GHASH operation when selecting no encryption)
- AES-CCM and AES-GCM modes support continuation with hold/resume of payload data
- 32-bit word access to provide key data, input data, and output data
- AESADV ready interrupt
- DMA triggers for input/output data
- Supported in RUN and SLEEP (see the Operating Modes section of
the device technical reference manual)
For more details, see the AESADV chapter of the MSPM0 L-Series 32MHz Microcontrollers Technical Reference Manual.