SLASFB5 May 2024 MSPM0L1228-Q1 , MSPM0L2228-Q1
ADVANCE INFORMATION
MSPM0Lx22x microcontrollers (MCUs) are part of the highly integrated, ultra-low-power 32-bit MSPM0 MCU family based on the Arm® Cortex®-M0+ 32-bit core platform, operating at up to 32MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 128KB to 256KB of flash memory in small packages (down to 4mm x 4mm) or high pin count packages (up to 80 pins). These devices include a VBAT backup island, an optional segmented LCD controller (on MSPM0L222x), cybersecurity enablers, and high-performance integrated analog, and provide excellent low-power performance across the operating temperature range.
Up to 256KB of embedded flash program memory with built-in error correction code (ECC) and up to 32KB SRAM with ECC and parity protection is provided. The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks. An additional 32-byte backup memory is provided in the VBAT island, supplied by the VBAT pin and retained even when the main supply (VDD) is lost.
The VBAT island provides a fully independent auxiliary power domain (separate from the main supply) which supplies low frequency modules from an alternate supply such as a battery, supercapacitor, or alternate voltage level (1.62V to 3.6V). The VBAT island includes the low-frequency clock system (LFOSC, LFXT), the real-time clock, the tamper detection, and timestamp logic, an independent watchdog timer, and a 32-byte backup memory. Up to five digital IOs are powered from the VBAT supply. A charging mode is provided to optionally trickle charge a supercapacitor on the VBAT pin from the primary (VDD) supply when VDD is greater than VBAT.
An ultra-low power segmented LCD controller (on MSPM0L2228 and MSPM0L2227 devices) supports driving LCD glass with up to 59 pins in a variety of mux and bias configurations, enabling low cost displays.
Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is Arm® PSA Level 1 certified.
A set of high-performance analog modules is provided, including a 12-bit 1.68Msps SAR ADC supporting up to 26 external channels. An analog comparator is provided to support low power or low latency monitoring of analog signals. An on-chip voltage reference (1.4V or 2.5V) can be used to provide a stable reference voltage to the ADC and comparator. Environmental monitoring of the die temperature, VDD voltage, and VBAT voltage is supported.
The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project's needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.
MSPM0Lx22x MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSP Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.
For complete module descriptions, see the MSPM0 L-Series 32MHz Microcontrollers Technical Reference Manual.
System-level ESD protection must be applied in compliance with the device-level ESD specification to prevent electrical overstress or disturbing of data or code memory. See MSP430™ System-Level ESD Considerations for more information. The principles in this application note are applicable to MSPM0 MCUs.