SLASFB5A May   2024  – November 2024 MSPM0L1228-Q1 , MSPM0L2228-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
    1. 5.1 Device Comparison Chart
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
      16.      28
      17.      29
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  VBat Characteristics
    8. 7.8  Flash Memory Characteristics
    9. 7.9  Timing Characteristics
    10. 7.10 Clock Specifications
      1. 7.10.1 System Oscillator (SYSOSC)
      2. 7.10.2 Low Frequency Oscillator (LFOSC)
      3. 7.10.3 Low Frequency Crystal/Clock
      4. 7.10.4 High Frequency Crystal/Clock
    11. 7.11 Digital IO
      1. 7.11.1 Electrical Characteristics
      2. 7.11.2 Switching Characteristics
    12. 7.12 Analog Mux VBOOST
    13. 7.13 ADC
      1. 7.13.1 Electrical Characteristics
      2. 7.13.2 Switching Characteristics
      3. 7.13.3 Linearity Parameters
      4. 7.13.4 Typical Connection Diagram
    14. 7.14 Temperature Sensor
    15. 7.15 VREF
      1. 7.15.1 Electrical Characteristics ADC
      2. 7.15.2 Electrical Characteristics (Comparator)
      3. 7.15.3 Voltage Characterisitcs (ADC)
      4. 7.15.4 Voltage Characterisitcs (Comparator)
    16. 7.16 Comparator (COMP)
      1. 7.16.1 Comparator Electrical Characteristics
    17. 7.17 LCD
    18. 7.18 I2C
      1. 7.18.1 I2C Characteristics
      2. 7.18.2 I2C Filter
      3. 7.18.3 I2C Timing Diagram
    19. 7.19 SPI
      1. 7.19.1 SPI
      2. 7.19.2 SPI Timing Diagram
    20. 7.20 UART
    21. 7.21 TIMx
    22. 7.22 TRNG
      1. 7.22.1 TRNG Electrical Characteristics
      2. 7.22.2 TRNG Switching Characteristics
    23. 7.23 Emulation and Debug
      1. 7.23.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0Lx22x)
    4. 8.4  Security
    5. 8.5  Power Management Unit (PMU)
    6. 8.6  Clock Module (CKM)
    7. 8.7  DMA
    8. 8.8  Events
    9. 8.9  Memory
      1. 8.9.1 Memory Organization
      2. 8.9.2 Peripheral File Map
      3. 8.9.3 Peripheral Interrupt Vector
    10. 8.10 Flash Memory
    11. 8.11 SRAM
    12. 8.12 GPIO
    13. 8.13 IOMUX
    14. 8.14 ADC
    15. 8.15 Temperature Sensor
    16. 8.16 LFSS
    17. 8.17 VREF
    18. 8.18 COMP
    19. 8.19 TRNG
    20. 8.20 AESADV
    21. 8.21 Keystore
    22. 8.22 CRC
    23. 8.23 UART
    24. 8.24 I2C
    25. 8.25 SPI
    26. 8.26 IWDT
    27. 8.27 WWDT
    28. 8.28 RTC_A
    29. 8.29 Timers (TIMx)
    30. 8.30 LCD
    31. 8.31 Device Analog Connections
    32. 8.32 Input/Output Diagrams
    33. 8.33 Serial Wire Debug Interface
    34. 8.34 Bootstrap Loader (BSL)
    35. 8.35 Device Factory Constants
    36. 8.36 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.13.2 Switching Characteristics

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
fADCCLK ADC clock frequency 4 32 MHz
tADC trigger  Software trigger minimum width 3 ADCCLK cycles
tSample Sampling time 12-bit mode, RS = 50Ω, Cpext = 10pF  156 ns
tSample_VREF Sample time with VREF ADC Channel = 28, 12-bit mode, VDD as reference 4 µs
tSample_SupplyMon(VDD) Sample time with Supply Monitor (VDD/3)(1) 5 µs
tSample_SupplyMon(VBAT) Sample time with Supply Monitor (VBAT/3)(1) 5 µs
(1)
Analog power supply monitor. Analog input on channel 31 for VDD monitor and channel 30 for VBAT monitor is disconnected and is internally connected to the voltage divider which is VDD/3.