SLAU202B December   2006  – October 2024 DAC8831 , DAC8832

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Hardware Setup
      1. 2.1.1 Hardware Theory of Operation
      2. 2.1.2 Jumper Definitions
      3. 2.1.3 Connector Definitions
      4. 2.1.4 Test Points
    2. 2.2 Hardware Overview
      1. 2.2.1 Electrostatic Discharge Caution
      2. 2.2.2 Connecting the FTDI Digital Controller
  9. 3Software
    1. 3.1 Software Setup
      1. 3.1.1 Software Installation
    2. 3.2 Software Overview
      1. 3.2.1 Launching the Software
      2. 3.2.2 Software Features
        1. 3.2.2.1 High Level Configuration Page
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6Related Documentation
  13. 7Revision History

Hardware Theory of Operation

The DAC8831EVM is connected to the computer through the onboard FTDI digital controller using the USB cable that is supplied with the EVM. The evaluation board features connectors and test points for all communication lines, DAC outputs, and supplies. Figure 2-1 shows a block diagram of the DAC8831EVM.

DAC883xEVM Theory of Operation Block Diagram Figure 2-1 Theory of Operation Block Diagram

The USB connection provides the 5V supply to the EVM. Voltage regulators generate 3.3V from the USB 5V supply. This 3.3V supply is used to power the FTDI controller.

The VDD supply can use the onboard 5V or 3.3V supplies depending on the J10 jumper setting. By default, VDD is connected to the onboard 3.3V supply. Alternatively, VDD can be supplied externally through banana jack J1. Remove the jumper connector on J10 before connecting external supplies to VDD.

The device VREF is supplied by the onboard 2.5V voltage regulator (by shorting jumper J11), or from an external supply (with SMA connector J5).

Each of the DAC outputs have footprints available for capacitor and resistor loads that are unpopulated by default.