SLAU320AJ July 2010 – May 2021
Reference function: GetDevice_430Xv2
For the 5xx and 6xx families, the CPU is taken under JTAG control by setting bit 10 (TCE1) of the JTAG control signal register to 1. While the flow to take the target device under JTAG control is identical to the flow described in Section 2.3.2.1.1, additional actions must be taken to completely take over control of the target CPU; for example, it is not recommended to take over control without performing a CPU reset by setting the POR signal in the JTAG Control Signal Register. Also, care must be taken that the CPU is in the Full-Emulation-State (equivalent to the Instruction-Fetch state for MSP430 and MSP430X architectures) by setting the CPUSUSP signal and providing a number of TCLK until the CPU prefetch pipes are cleared. Figure 2-15 shows the full sequence required to get the CPU in the Full-Emulation-State.
Reference function: GetCoreID
Figure 2-16 shows the JTAG-entry sequence for MSP430Xv2 devices. If no valid JTAG-ID is returned by the first entry sequence approach, a second one that uses a "magic pattern" is executed. The differences between these two entry approaches is: the second approach holds the device in reset and shifts in a "magic pattern" (0xA55A) by using the JTAG mailbox. The magic pattern is read by the BootCode, and the device is sent into LPM4. If the device is in LPM4, no user code is executed. The magic pattern mode forces a reset of the device.
In the special case that the device is in LPMx.5 (low-power mode where JTAG is unpowered and the JTAG pins are locked by the ioLock), another mechanism is needed to take the device under JTAG control. Only the TEST and the REST pin are not pulled down by the ioLock. That means that these pins must be used to get control over the device. Compared to the normal SBW communication, which uses TDI/TDO and TMS pins in the replicator implementation, TEST and RST are used for SBW communication to disable the ioLock.
IR_Shift(IR_COREIP_ID) |
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CoreId = DR_Shift16(0) |
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CoreId = 0 ? | Yes | |
No | ||
IR_Shift(IR_DEVICE_ID) |
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DeviceIdPointer = DR_Shift20(0) |
IR_SHIFT("IR_CNTRL_SIG_16BIT") |
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DR_SHIFT16(0x1501) |
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IR_SHIFT("IR_CNTRL_SIG_CAPTURE") |
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DR_SHIFT16(0x0000) |
No | ||
Bit 9 of TDOword = 1? | |||
Yes | |||
CPU is under JTAG control - always apply Power on Reset (POR) afterwards. |