SLAU320AJ July 2010 – May 2021
The MSP430X architecture is based on a 20-bit memory address bus (MAB), to address up to 1 MB of continuous memory. No new JTAG instructions are needed to control the 20-bit MAB (for details on instructions, see Section 2.2.4.1), only the JTAG address register itself has been extended to 20 bits. This macro loads a 20-bit address word into the 20-bit wide JTAG MAB register. The address word is shifted, MSB first, into the TDI input of the target MSP430 device. Each bit is captured from TDI on a rising edge of TCK. At the same time, TDO shifts out the last captured and stored value in the JTAG MAB register. A new bit is present at TDO with a falling edge of TCK. TCLK should not change state while this macro is executing. This macro should only be used when IR_ADDR_16BIT or IR_ADDR_CAPTURE has been loaded into the JTAG instruction register before the MAB is manipulated through JTAG. On a 20-bit shift access, the upper four bits (19:16) of the JTAG address register are shifted out last. Therefore, bit 15 of the MAB is read first when the lower part of the MAB is accessed by performing a 16-bit shift. This implementation ensures compatibility with the original MSP430 architecture and its JTAG MAB register implementation.
The DR_SHIFT20 (20-bit Address) macro in the associated C-code software example application automatically reconstructs the swapped TDO (15:0) (19:16) output to a continuous 20-bit address word (19:0) and simply returns a 32-bit LONG value.
Figure 2-5 shows how to load a 20-bit address word into the JTAG address register and read out a stored value through TDO.