SLAU472C February 2013 – November 2023 TAS2505 , TAS2505-Q1
The audio interface of the TAS2505 can be put into I2S mode by programming page 0, register 27, bits D7–D6 = to 00. In I2S mode, the MSB of the left channel is valid on the second rising edge of the bit clock after the falling edge of the word clock. Similarly, the MSB of the right channel is valid on the second rising edge of the bit clock after the rising edge of the word clock.
For I2S mode, the number of bit clocks per channel should be greater than or equal to the programmed word length of the data. Also the programmed offset value should be less than the number of bit clocks per frame by at least the programmed word length of the data.