SLAU640B April   2019  – March 2023 ADC12DJ5200SE

 

  1.   Introduction
  2. 1Trademarks
  3. 2Equipment
    1. 2.1 Evaluation Board Feature Identification Summary
    2. 2.2 Required Equipment
  4. 3Setup Procedure
    1. 3.1  Install the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Install the Configuration GUI Software
    3. 3.3  Connect the EVM and TSW14J57EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Signal Generators to the EVM (RF Outputs Disabled Until Directed)
    6. 3.6  Turn On the TSW14J57EVM Power and Connect to the PC
    7. 3.7  Turn On the ADC12DJ5200RFEVM/SEEVM Power Supplies and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Open the ADC12DJ5200RFEVM/SEEVM GUI and Program the ADC and Clocks
    10. 3.10 Calibrate the ADC Device on the EVM
    11. 3.11 Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM
    12. 3.12 Capture Data Using the HSDC Pro Software
  5. 4Device Configuration
    1. 4.1 Supported JESD204C Device Features
    2. 4.2 Tab Organization
    3. 4.3 Low-Level Control
  6. 5Troubleshooting the ADC12DJ5200RFEVM/SEEVM
  7. 6References
    1. 6.1 Technical Reference Documents
    2. 6.2 TSW14J57EVM Operation
  8. 7HSDC Pro Settings for Optional ADC Device Configuration
    1. 7.1 Changing the Number of Frames per Multi-Frame (K)
    2. 7.2 Customizing the EVM for Optional Clocking Support
      1. 7.2.1 External Clocking Option (Default)
      2. 7.2.2 Onboard Clocking Option
      3. 7.2.3 External Reference Clocking Option
  9. 8Signal Routing
    1. 8.1 Signal Routing
  10.   A Analog Inputs
  11.   B Jumpers and LEDs
    1. 10.1 Jumper settings
  12.   B Revision History

A Analog Inputs

#GUID-8B5D1798-79C2-40CC-85CB-DB4D8CAAFE67/T5692721-7 provides the different settings for setting the analog inputs path.

Table A-1 Analog Input Path
CouplingInputSMA to UseR2, R6, R10, R14R1, R8, R9, R16
AC (default)

5200RF

S/E Balun
(500kHz to 9GHz)		INA(J4), INB(J7)0 ΩDNI

AC (default) 5200SE

Intergrated Balun

INAP(J5)

INBP(J6)

DNI

R1, R16 = DNI C74, C75 = 0.1uF

ACDifferential

5200SE = N/A

INAP(J5), INAM(J3),
INBP(J6), INBM(J8)		DNI0.1 µF
DCDifferential

5200SE = N/A

INAP, INAM, INBP, INBMDNI0 Ω
GUID-DB68F2B5-E79A-4468-ADA3-135970E62E24-low.pngFigure A-1 Analog Input Path

A 3dB attenuation pad is added between the inputs and the ADC. The 3 dB pad helps with the flatness of the frequency response.

GUID-44B9DE3D-764A-4CFD-9ADC-84282A9AF473-low.pngFigure A-2 3 dB attenuation pad