SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
AES Crypto Data Length 0 (AES_C_LENGTH_0), offset 0x054
AES Crypto Data Length 1 (AES_C_LENGTH_1), offset 0x058
AES Crypto Data Length n (AES_C_LENGTH_n) registers (LSW and MSW) store the cryptographic data length in bytes for all modes. The AES_C_LENGTH_0 register stores the most significant word and the AES_C_LENGTH_1 register stores the least significant word. Once processing with this context is started, this length decrements to zero. Data lengths up to (261 – 1) bytes are allowed. For GCM, any value up to 236 – 32 bytes can be used. This is because a 32-bit counter mode is used; the maximum number of 128-bit blocks is 232 – 2, resulting in a maximum number of bytes of 236 – 32. A write to this register triggers the engine to start using this context. This is valid for all modes except GCM and CCM. Note that for the combined modes, this length does not include the authentication only data; the authentication length is specified in the AES_AUTH_LENGTH register below. All modes must have a length greater than 0. For the combined modes, it is permissible to have one of the lengths equal to zero. For the basic encryption modes (ECB/CBC/CTR/ICM/CFB128) it is permissible to program zero to the length field; in that case the length is assumed infinite. All data must be byte (8-bit) aligned; bit aligned data streams are not supported by the AES Engine.
NOTE
For a Host read operation, these registers return all zeroes.
AES_C_LENGTH_n is shown in Figure 9-17 and described in Table 9-11.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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