9.5.13 AES_DIRTYBITS Register (Offset = 0x94) [reset = 0x0]
AES Dirty Bits (AES_DIRTYBITS)
This register can be used to identify if AES registers have been read or written to.
AES_DIRTYBITS is shown in Figure 9-26 and described in Table 9-20.
Return to Summary Table.
Figure 9-26 AES_DIRTYBITS Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
| RESERVED |
| R-0x0 |
|
| 23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
| RESERVED |
| R-0x0 |
|
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
S_DIRTY |
S_ACCESS |
| R-0x0 |
R/W1C-0x0 |
R/W1C-0x0 |
|
Table 9-20 AES_DIRTYBITS Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-2 |
RESERVED |
R |
0x0 |
|
| 1 |
S_DIRTY |
R/W1C |
0x0 |
AES Dirty Bit.
This bit must be written to a 1 to clear.
0x0 = No AES registers have been written.
0x1 = Indicates when any of the AES_x registers have been written (except for the AES_DIRTYBITS register).
|
| 0 |
S_ACCESS |
R/W1C |
0x0 |
AES Access Bit.
This bit must be written to a 1 to clear.
0x0 = No AES registers have been read.
0x1 = Indicates when any of the AES_x registers have been read (except for the AES_DIRTYBITS register).
|