19.4.1 Configure the I2C Module to Transmit a Single Byte as a Master
The following example shows how to configure the I2C module to transmit a single byte as a master. This assumes the system clock is 20 MHz.
- Enable the I2C clock using the RCGCI2C register in the System Control module (see Section 4.2.93).
- Enable the clock to the appropriate GPIO module using the RCGCGPIO register in the System Control module (see Section 4.2.87). To find out which GPIO port to enable, see the device-specific data sheet.
- In the GPIO module, enable the appropriate pins for their alternate function using the GPIOAFSEL register (see Section 17.5.10). To determine which GPIOs to configure, see the device-specific data sheet.
- Enable the I2CSDA pin for open-drain operation. See Section 17.5.14.
- Configure the PMCn fields in the GPIOPCTL register to assign the I2C signals to the appropriate pins. See Section 17.5.22 and the device-specific data sheet.
- Initialize the I2C master by writing the I2CMCR register with a value of 0x0000.0010.
- Set the desired SCL clock speed of 100 kbps by writing the I2CMTPR register with the correct value. The value written to the I2CMTPR register represents the number of system clock periods in one SCL clock period. The TPR value is calculated by using Equation 63:
TPR = (System Clock / (2 × (SCL_LP + SCL_HP) × SCL_CLK)) – 1
TPR = (20 MHz / (2 × (6 + 4) × 100000)) – 1
Equation 63. TPR = 9
Write the I2CMTPR register with the value of 0x0000.0009.
- Specify the slave address of the master and that the next operation is a Transmit by writing the I2CMSA register with a value of 0x0000.0076. This sets the slave address to 0x3B.
- Place data (byte) to be transmitted in the data register by writing the I2CMDR register with the desired data.
- Initiate a single byte transmit of the data from master to slave by writing the I2CMCS register with a value of 0x0000.0007 (STOP, START, RUN).
- Wait until the transmission completes by polling the BUSBSY bit in the I2CMCS register until it has been cleared.
- Check the ERROR bit in the I2CMCS register to confirm the transmit was acknowledged.