SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Ethernet MAC Transmit Descriptor List Address (EMACTXDLADDR)
The MAC Transmit Descriptor List Address (EMACTXDLADDR) register points to the start of the transmit descriptor list. The descriptor lists reside in the host's physical memory space and must be word-aligned.
This register can only be written when the DMA transmit has stopped (ST = 0 in the MAC DMA Operation Mode (EMACDMAOPMODE) register). When the ST bit is set, the DMA takes the uses the newly programmed descriptor base address.
If this register is not changed when the ST bit is set to 0, then the DMA uses the already existing descriptor address.
EMACTXDLADDR is shown in Figure 15-73 and described in Table 15-83.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
TXDLADDR | |||||||
R/W-0x0 | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
TXDLADDR | |||||||
R/W-0x0 | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TXDLADDR | |||||||
R/W-0x0 | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TXDLADDR | RESERVED | ||||||
R/W-0x0 | R-0x0 | ||||||