SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
EPI Host-Bus PSRAM (EPIHBPSRAM)
This register holds the PSRAM configuration register value. When the WRCRE bit in the EPIHB16CFGn register is set, all 21 bits of the EPIHBPSRAM register's CR value are written to the PSRAM's configuration register. When the RDCRE bit is set in the EPIHB16CFGn register, a read of the PSRAM's configuration register takes place and the value is written to bits[15:0] of the EPIHBPSRAM. Bits[20:16] will not contain any valid data.
EPIHBPSRAM is shown in Figure 16-65 and described in Table 16-49.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | CR | ||||||||||||||||||||||||||||||
| R-0x0 | R/W-0x0 | ||||||||||||||||||||||||||||||